10N40C1D IGBT Transistor Datasheet. Parameters and Characteristics.

Type Designator: 10N40C1D

Type of IGBT channel: N-Channel

Maximum power dissipation (Pc) of IGBT transistor, W: 75W

Maximum collector-emitter voltage |Uce|, V: 400V

Collector-emitter saturation voltage |Ucesat|, V: 2.5V

Maximum gate-emitter voltage |Ueg|, V: 20V

Maximum collector current |Ic|, A: 10A

Maximum junction temperature (Tj), °C: 150

Rise time, nS: 50

Maximum collector capacity (Cc), pF:

Package: TO220

Equivalent transistors for 10N40C1D

10N40C1D PDF document for downloads:

1.1. hgtp10n40c1d_hgtp10n40e1d_hgtp10n50c1d_hgtp10n50e1d.pdf Size:47K _harris_semi

HGTP10N40C1D, HGTP10N40E1D, S E M I C O N D U C T O R HGTP10N50C1D, HGTP10N50E1D 10A, 400V and 500V N-Channel IGBTs with Anti-Parallel Ultrafast Diodes April 1995 Features Package JEDEC TO-220AB • 10A, 400V and 500V • VCE(ON): 2.5V Max. EMITTER COLLECTOR • TFALL: 1µs, 0.5µs GATE • Low On-State Voltage COLLECTOR • Fast Switching Speeds (FLANGE) • High Input Impedance • Anti-Parallel Diode Applications • Power Supplies Terminal Diagram • Motor Drives N-CHANNEL ENHANCEMENT MODE • Protective Circuits C Description The HGTP10N40C1D, HGTP10N40E1D, HGTP10N50C1D, and HGTP10N50E1D are n-channel enhancement-mode G insulated gate bipolar transistors (IGBTs) designed for high voltage, low on-dissipation applications such as switching reg- ulators and motor drivers. They feature a discrete anti-parallel E diode that shunts current around the IGBT in the reverse direction without introducing carriers into the depletion region. These types can be operated directly

5.1. mtp10n40erev0x.pdf Size:249K _motorola

MOTOROLA Order this document SEMICONDUCTOR TECHNICAL DATA by MTP10N40E/D Designer's? Data Sheet MTP10N40E TMOS E-FET.? High Energy Power FET N–Channel Enhancement–Mode Silicon Gate TMOS POWER FET This advanced high voltage TMOS E–FET is designed to 10 AMPERES withstand high energy in the avalanche mode and switch efficiently. 400 VOLTS This new high energy device also offers a drain–to–source diode RDS(on) = 0.55 OHMS with fast recovery time. Designed for high voltage, high speed switching applications such as power supplies, PWM motor ? controls and other inductive loads, the avalanche energy capability is specified to eliminate the guesswork in designs where inductive loads are switched and offer additional safety margin against unexpected voltage transients. • Avalanche Energy Capability Specified at Elevated D Temperature • Low Stored Gate Charge for Efficient Switching • Internal Source–to–Drain Diode Designed to Replace External Zener Transient Suppress

5.2. mtb10n40erev0x.pdf Size:273K _motorola

MOTOROLA Order this document SEMICONDUCTOR TECHNICAL DATA by MTB10N40E/D Designer's? Data Sheet MTB10N40E TMOS E-FET.? Motorola Preferred Device High Energy Power FET D2PAK for Surface Mount TMOS POWER FET N–Channel Enhancement–Mode Silicon Gate 10 AMPERES 400 VOLTS The D2PAK package has the capability of housing a larger die RDS(on) = 0.55 OHM than any existing surface mount package which allows it to be used in applications that require the use of surface mount components with higher power and lower RDS(on) capabilities. This high voltage MOSFET uses an advanced termination scheme to provide ? enhanced voltage–blocking capability without degrading perfor- mance over time. In addition, this advanced TMOS E–FET is designed to withstand high energy in the avalanche and commuta- tion modes. The new energy efficient design also offers a D drain–to–source diode with a fast recovery time. Designed for high voltage, high speed switching applications in power supplie

5.3. mtb10n40e.pdf Size:234K _motorola

MOTOROLA Order this document SEMICONDUCTOR TECHNICAL DATA by MTB10N40E/D Designer's? Data Sheet MTB10N40E TMOS E-FET.? Motorola Preferred Device High Energy Power FET D2PAK for Surface Mount TMOS POWER FET N–Channel Enhancement–Mode Silicon Gate 10 AMPERES 400 VOLTS The D2PAK package has the capability of housing a larger die RDS(on) = 0.55 OHM than any existing surface mount package which allows it to be used in applications that require the use of surface mount components with higher power and lower RDS(on) capabilities. This high voltage MOSFET uses an advanced termination scheme to provide ? enhanced voltage–blocking capability without degrading perfor- mance over time. In addition, this advanced TMOS E–FET is designed to withstand high energy in the avalanche and commuta- tion modes. The new energy efficient design also offers a D drain–to–source diode with a fast recovery time. Designed for high voltage, high speed switching applications in power supplie

5.4. mtp10n40e.pdf Size:212K _motorola

MOTOROLA Order this document SEMICONDUCTOR TECHNICAL DATA by MTP10N40E/D Designer's? Data Sheet MTP10N40E TMOS E-FET.? High Energy Power FET N–Channel Enhancement–Mode Silicon Gate TMOS POWER FET This advanced high voltage TMOS E–FET is designed to 10 AMPERES withstand high energy in the avalanche mode and switch efficiently. 400 VOLTS This new high energy device also offers a drain–to–source diode RDS(on) = 0.55 OHMS with fast recovery time. Designed for high voltage, high speed switching applications such as power supplies, PWM motor ? controls and other inductive loads, the avalanche energy capability is specified to eliminate the guesswork in designs where inductive loads are switched and offer additional safety margin against unexpected voltage transients. • Avalanche Energy Capability Specified at Elevated D Temperature • Low Stored Gate Charge for Efficient Switching • Internal Source–to–Drain Diode Designed to Replace External Zener Transient Suppress

5.5. php10n40_1.pdf Size:53K _philips2

Philips Semiconductors Product specification PowerMOS transistor PHP10N40 GENERAL DESCRIPTION QUICK REFERENCE DATA N-channel enhancement mode SYMBOL PARAMETER MAX. UNIT field-effect power transistor in a plastic envelope featuring high VDS Drain-source voltage 400 V avalanche energy capability, stable ID Drain current (DC) 10.7 A blocking voltage, fast switching and Ptot Total power dissipation 147 W high thermal cycling performance RDS(ON) Drain-source on-state resistance 0.55 ? with low thermal resistance. Intended for use in Switched Mode Power Supplies (SMPS), motor control circuits and general purpose switching applications. PINNING - TO220AB PIN CONFIGURATION SYMBOL PIN DESCRIPTION d tab 1 gate 2 drain g 3 source tab drain 1 2 3 s LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT ID Continuous drain current Tmb = 25 ?C; VGS = 10 V - 10.7 A Tmb = 100 ?C; VGS = 10 V - 6.7

5.6. hgtp10n40f.pdf Size:43K _harris_semi

HGTP10N40F1D, S E M I C O N D U C T O R HGTP10N50F1D 10A, 400V and 500V N-Channel IGBTs with Anti-Parallel Ultrafast Diodes April 1995 Features Package JEDEC TO-220AB • 10A, 400V and 500V • Latch Free Operation EMITTER • Typical Fall Time < 1.4µs COLLECTOR GATE • High Input Impedance • Low Conduction Loss COLLECTOR (FLANGE) • Anti-Parallel Diode • tRR < 60ns Description The IGBT is a MOS gated high voltage switching device combin- ing the best features of MOSFETs and bipolar transistors. The device has the high input impedance of a MOSFET and the low Terminal Diagram on-state conduction loss of a bipolar transistor. The much lower N-CHANNEL ENHANCEMENT MODE on-state voltage drop varies only moderately between +25oC C and +150oC. The diode used in parallel with the IGBT is an ultrafast (tRR < 60ns) with soft recovery characteristic. IGBTs are ideal for many high voltage switching applications operating at frequencies where low conduction losses are G essen

See also transistors datasheet: 10N40C1D , 10N40E1D , 10N40F1D , 10N50C1D , 10N50E1D , 10N50F1D , 12N60C3D , 14N36GVL , 12N60C3D , 1MB05-120 , 1MB05D-120 , 1MB08-120 , 1MB08D-120 , 1MB10-120 , 1MB10D-120 , 1MB15D-060 , 1MB20-060 .

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