STD10N10-1 MOSFET transistor datasheet. Parameters and characteristics.

Type Designator: STD10N10-1

Type of STD10N10-1 transistor: MOSFET

Type of control channel: N -Channel

Maximum power dissipation (Pd), W: 50

Maximum drain-source voltage |Uds|, V: 100V

Maximum gate-source voltage |Ugs|, V: 20

Maximum drain current |Id|, A: 10

Maximum junction temperature (Tj), °C: 175

Rise Time of STD10N10-1 transistor (tr), nS:

Drain-source Capacitance (Cd), pF: 750

Maximum drain-source on-state resistance (Rds), Ohm: 0.2

Package: IPAK

Equivalent transistors for STD10N10-1

STD10N10-1 PDF doc:

4.1. std10nf06l.pdf Size:302K _st

STD10NF06L N-CHANNEL 60V - 0.1? - 10A DPAK STripFET™ POWER MOSFET PRELIMINARY DATA TYPE VDSS RDS(on) ID STD10NF06L 60V <0.12? 10A TYPICAL RDS(on) = 0.1? SURFACE-MOUNTING DPAK (TO-252) POWER 3 PACKAGE IN TAPE & REEL (SUFFIX “T4”) 1 DESCRIPTION DPAK This MOSFET series realized with STMicroelectronics unique STripFET™ process has specifically been de- signed to minimize input capacitance and gate charge. It is therefore suitable as primary switch in advanced high-efficiency, high-frequency isolated DC-DC con- INTERNAL SCHEMATIC DIAGRAM verters for Telecom and Computer applications. It is also intended for any applications with low gate drive requirements. APPLICATIONS DC-DC & DC-AC CONVERTERS DC MOTOR CONTROL ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit VDS Drain-source Voltage (VGS = 0) 60 V VDGR Drain-gate Voltage (RGS = 20 k?) 60 V VGS Gate- source Voltage ± 15 V ID Drain Current (continuos) at TC = 25°C 10 A ID Drain Current (continuos) at T

4.2. std10nm60n_stf10nm60n_stp10nm60n_stu10nm60n_2.pdf Size:997K _st

STD10NM60N, STF10NM60N STP10NM60N, STU10NM60N N-channel 600 V, 0.53 ?, 8 A, DPAK, TO-220, TO-220FP, IPAK MDmesh™ II Power MOSFET Features VDSS RDS(on) Type ID Pw @TJmax max. 3 3 STD10NM60N 70 W 2 2 1 1 STF10NM60N 25 W TO-220 TO-220FP 650 V < 0.55 ? 8 A STP10NM60N 70 W STU10NM60N 3 ¦ 100% avalanche tested 2 3 1 1 ¦ Low input capacitance and gate charge IPAK DPAK ¦ Low gate input resistance Application ¦ Switching applications Figure 1. Internal schematic diagram Description D(2) These devices are N-channel 600 V Power MOSFET realized using the second generation of MDmesh™ technology. It applies the benefits of the multiple drain process to STMicroelectronics’ G(1) well-known PowerMESH™ horizontal layout structure. The resulting product offers improved on-resistance, low gate charge, high dv/dt capability and excellent avalanche characteristics. S(3) AM01475v1 Table 1. Device summary Order code Marking Package Packaging STD10NM60N 1

4.3. std10nm60n_stf10nm60n_stp10nm60n_stu10nm60n.pdf Size:901K _st

STD10NM60N, STF10NM60N STP10NM60N, STU10NM60N N-channel 600 V, 0.53 ?, 10 A, DPAK, TO-220, TO-220FP, IPAK MDmesh™ II Power MOSFET Features VDSS RDS(on) Order codes ID Pw @TJmax max. 3 3 STD10NM60N 70 W 2 2 1 1 STF10NM60N 25 W TO-220 TO-220FP 650 V < 0.55 ? 10 A STP10NM60N 70 W STU10NM60N 3 ¦ 100% avalanche tested 2 3 1 1 ¦ Low input capacitance and gate charge IPAK DPAK ¦ Low gate input resistance Application Switching applications Figure 1. Internal schematic diagram Description D(2) These devices are N-channel 600 V Power MOSFET realized using the second generation of MDmesh™ technology. It applies the benefits of the multiple drain process to STMicroelectronics’ G(1) well-known PowerMESH™ horizontal layout structure. The resulting product offers improved on-resistance, low gate charge, high dv/dt capability and excellent avalanche characteristics. S(3) AM01475v1 Table 1. Device summary Order codes Marking Package Packaging STD1

4.4. std10nm50n_stf10nm50n_stp10nm50n.pdf Size:951K _st

STD10NM50N STF10NM50N, STP10NM50N N-channel 500 V, 0.53 ?, 7 A TO-220, TO-220FP, DPAK MDmesh™ II Power MOSFET Features VDSS RDS(on) Type ID (@Tjmax) max 3 3 2 2 1 STD10NM50N 1 TO-220FP TO-220 STF10NM50N 550 V < 0.63 ? 7 A STP10NM50N ¦ 100% avalanche tested 3 ¦ Low input capacitance and gate charge 1 ¦ Low gate input resistance DPAK Application Switching applications Figure 1. Internal schematic diagram Description D(2) This series of devices is realized with the second generation of MDmesh™ technology. This revolutionary Power MOSFET associates a new vertical structure to the company’s strip layout to yield one of the world’s lowest on-resistance and G(1) gate charge. It is therefore suitable for the most demanding high efficiency converters. S(3) AM01475v1 Table 1. Device summary Order codes Marking Packages Packaging STD10NM50N DPAK Tape and reel STF10NM50N 10NM50N TO-220FP Tube STP10NM50N TO-220 September 2010 Doc ID 16929 Rev 2 1/

4.5. std10nf10.pdf Size:457K _st

STD10NF10 STD10NF10-1 N-channel 100V - 0.115? - 13A - DPAK - IPAK Low gate charge STripFET™ II Power MOSFET General features VDSSS RDS(on) ID Type STD10NF10 100V <0.13? 13A 3 3 STD10NF10-1 100V <0.13? 13A 2 1 1 ¦ Exceptional dv/dt capability DPAK IPAK ¦ Application oriented characterization Description This MOSFET series realized with STMicroelectronics unique STripFET process has Internal schematic diagram specifically been designed to minimize input capacitance and gate charge. It is therefore suitable as primary switch in advanced high- efficiency, high-frequency isolated DC-DC converters for Telecom and Computer applications. It is also intended for any applications with low gate drive requirements. Applications ¦ Switching application Order codes Part number Marking Package Packaging STD10NF10T4 D10NF10 DPAK Tape & reel STD10NF10-1 D10NF10 IPAK Tube August 2006 Rev 3 1/14 www.st.com 14 Contents STD10NF10 Contents 1 Electrical ratings . .

4.6. std10nm65n_stf10nm65n_stp10nm65n_stu10nm65n.pdf Size:525K _st

STD10NM65N - STF10NM65N STP10NM65N - STU10NM65N N-channel 650 V, 0.43 ?, 9 A MDmesh™ II Power MOSFET TO-220, TO-220FP, IPAK, DPAK Features VDSS RDS(on) Type ID 3 (@Tjmax) max 2 3 1 2 STD10NM65N 710 V < 0.48 ? 9 A 1 IPAK STF10NM65N 710 V < 0.48 ? 9 A(1) TO-220 STP10NM65N 710 V < 0.48 ? 9 A STU10NM65N 710 V < 0.48 ? 9 A 3 1. Limited only by maximum temperature allowed 1 3 2 ¦ 100% avalanche tested 1 DPAK TO-220FP ¦ Low input capacitance and gate charge ¦ Low gate input resistance Application Figure 1. Internal schematic diagram ¦ Switching applications Description This series of devices implements the second generation of MDmesh™ Technology. This revolutionary Power MOSFET associates a new vertical structure to the Company’s strip layout to yield one of the world’s lowest on-resistance and gate charge. It is therefore suitable for the most demanding high efficiency converters. Table 1. Device summary Order codes Marking Package Packaging

See also transistors datasheet: SSW4N80A , SSW4N80AS , SSW4N90A , SSW4N90AS , SSW5N80A , SSW5N90A , SSW6N70A , SSW7N60A , IRF460 , STD10N10L-1 , STD10N10LT4 , STD10N10T4 , STD12N05 , STD12N05-1 , STD12N05L , STD12N05L-1 , STD12N05LT4 .

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