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HUF75542P3 MOSFET (IC) Datasheet. Cross Reference Search. HUF75542P3 Equivalent

Type Designator: HUF75542P3

Type of HUF75542P3 transistor: MOSFET

Type of control channel: N -Channel

Maximum power dissipation (Pd), W: 230

Maximum drain-source voltage |Uds|, V: 80

Maximum gate-source voltage |Ugs|, V: 20

Maximum drain current |Id|, A: 75

Maximum junction temperature (Tj), °C: 175

Rise Time of HUF75542P3 transistor (tr), nS:

Drain-source Capacitance (Cd), pF:

Maximum drain-source on-state resistance (Rds), Ohm: 0.014

Package: TO220

HUF75542P3 Transistor Equivalent Substitute - MOSFET Cross-Reference Search

HUF75542P3 PDF doc:

1.1. huf75542p3-s3s.pdf Size:192K _fairchild_semi

HUF75542P3
HUF75542P3

HUF75542P3, HUF75542S3S Data Sheet December 2001 75A, 80V, 0.014 Ohm, N-Channel, UltraFET Power MOSFETs Packaging JEDEC TO-220AB JEDEC TO-263AB Features SOURCE DRAIN • Ultra Low On-Resistance GATE - rDS(ON) = 0.014?, VGS = 10V • Simulation Models GATE - Temperature Compensated PSPICE® and SABER™ SOURCE Electrical Models DRAIN - Spice and SABER Thermal Impedance Models (FLANGE)

3.1. huf75545p3_huf75545s3_huf75545s3s.pdf Size:270K _fairchild_semi

HUF75542P3
HUF75542P3

HUF75545P3, HUF75545S3, HUF75545S3S Data Sheet September 2002 75A, 80V, 0.010 Ohm, N-Channel, UltraFET® Power MOSFET Packaging JEDEC TO-220AB JEDEC TO-263AB DRAIN Features SOURCE (FLANGE) DRAIN GATE • Ultra Low On-Resistance - rDS(ON) = 0.010?, VGS = 10V GATE • Simulation Models SOURCE - Temperature Compensated PSPICE® and SABER™ DRAIN Electrical Models (FLANGE) HUF75545S

5.1. huf75639g3_huf75639p3_huf75639s3s_huf75639s3.pdf Size:229K _fairchild_semi

HUF75542P3
HUF75542P3

HUF75639G3, HUF75639P3, HUF75639S3S, HUF75639S3 Data Sheet December 2001 56A, 100V, 0.025 Ohm, N-Channel Features UltraFET Power MOSFETs • 56A, 100V These N-Channel power MOSFETs • Simulation Models are manufactured using the - Temperature Compensated PSPICE® and SABER™ innovative UltraFET® process. This Electrical Models advanced process technology - Spice and Saber Thermal Impe

5.2. huf75842p3.pdf Size:197K _fairchild_semi

HUF75542P3
HUF75542P3

HUF75842P3, HUF75842S3S Data Sheet December 2001 43A, 150V, 0.042 Ohm, N-Channel, UltraFET® Power MOSFET Packaging JEDEC TO-220AB JEDEC TO-263AB Features SOURCE DRAIN • Ultra Low On-Resistance DRAIN (FLANGE) GATE - rDS(ON) = 0.042?, VGS = 10V GATE • Simulation Models SOURCE - Temperature Compensated PSPICE® and SABER™ Electrical Models DRAIN - Spice and SABER Thermal Impedance

5.3. huf75309t3st.pdf Size:180K _fairchild_semi

HUF75542P3
HUF75542P3

HUF75309T3ST Data Sheet December 2001 3A, 55V, 0.070 Ohm, N-Channel UltraFET Features Power MOSFET • 3A, 55V This N-Channel power MOSFET is • Ultra Low On-Resistance, rDS(ON) = 0.070Ω manufactured using the innovative • Diode Exhibits Both High Speed and Soft Recovery UltraFET® process. This advanced process technology achieves the • Temperature Compensating PSPICE® M

5.4. huf75339g3_huf75339p3_huf75339s3s.pdf Size:308K _fairchild_semi

HUF75542P3
HUF75542P3

HUF75339G3, HUF75339P3, HUF75339S3S Data Sheet December 2001 75A, 55V, 0.012 Ohm, N-Channel UltraFET Features Power MOSFETs • 75A, 55V These N-Channel power MOSFETs • Simulation Models are manufactured using the - Temperature Compensated PSPICE® and SABER™ innovative UltraFET® process. This Models advanced process technology - SPICE and SABER Thermal Impedance Models achieves th

5.5. huf75631sk8.pdf Size:254K _fairchild_semi

HUF75542P3
HUF75542P3

 HUF75631SK8 Data Sheet December 2001 5.5A, 100V, 0.039 Ohm, N-Channel, UltraFET® Power MOSFET Packaging JEDEC MS-012AA Features BRANDING DASH • Ultra Low On-Resistance - rDS(ON) = 0.039Ω, VGS = 10V 5 • Simulation Models 1 - Temperature Compensated PSPICE® and SABER™ 2 Electrical Models 3 4 - Spice and SABER Thermal Impedance Models - www.fairchildsemi.com Symbol

5.6. huf75321p3_huf75321s3s.pdf Size:235K _fairchild_semi

HUF75542P3
HUF75542P3

HUF75321P3, HUF75321S3S Data Sheet December 2001 35A, 55V, 0.034 Ohm, N-Channel UltraFET Features Power MOSFETs • 35A, 55V These N-Channel power MOSFETs • Simulation Models are manufactured using the - Temperature Compensated PSPICE® and SABER™ innovative UltraFET® process. This Models advanced process technology - Thermal Impedance SPICE and SABER Models achieves the lowest pos

5.7. huf75652g3.pdf Size:195K _fairchild_semi

HUF75542P3
HUF75542P3

HUF75652G3 Data Sheet December 2001 75A, 100V, 0.008 Ohm, N-Channel UltraFET® Power MOSFET Packaging JEDEC TO-247 Features SOURCE DRAIN • Ultra Low On-Resistance GATE - rDS(ON) = 0.008?, VGS = 10V • Simulation Models - Temperature Compensated PSPICE® and SABER™ Electrical Models - Spice and SABER Thermal Impedance Models - www.fairchildsemi.com DRAIN HUF75652G3 (TAB) • Peak C

5.8. huf75343.pdf Size:205K _fairchild_semi

HUF75542P3
HUF75542P3

HUF75343G3, HUF75343P3, HUF75343S3S Data Sheet December 2001 75A, 55V, 0.009 Ohm, N-Channel UltraFET Features Power MOSFETs • 75A, 55V These N-Channel power MOSFETs • Simulation Models are manufactured using the - Temperature Compensating PSPICE® and SABER™ innovative UltraFET® process. This Models advanced process technology - Thermal Impedance PSPICE™ and SABER Mode

5.9. huf75852g3_f085.pdf Size:259K _fairchild_semi

HUF75542P3
HUF75542P3

HUFA75852G3_F085 Data Sheet December 2011 75A, 150V, 0.016 Ohm, N-Channel, UltraFET® Power MOSFET Packaging JEDEC TO-247 Features SOURCE • Ultra Low On-Resistance DRAIN GATE - rDS(ON) = 0.016Ω, VGS = 10V • Peak Current vs Pulse Width Curve • UIS Rating Curve • Qualified to AEC Q101 • RoHS Compliant DRAIN (TAB) Ordering Information Symbol PART NUMBER PACKAGE BRA

5.10. huf75852g3.pdf Size:193K _fairchild_semi

HUF75542P3
HUF75542P3

HUF75852G3 Data Sheet December 2001 75A, 150V, 0.016 Ohm, N-Channel, UltraFET® Power MOSFET Packaging JEDEC TO-247 Features SOURCE • Ultra Low On-Resistance DRAIN GATE - rDS(ON) = 0.016?, VGS = 10V • Simulation Models - Temperature Compensated PSPICE® and SABER™ Electrical Models - Spice and SABER Thermal Impedance Models - www.fairchildsemi.com DRAIN (TAB) • Peak Current vs P

5.11. huf75333g3_huf75333p3_huf75333s3s_huf75333s3.pdf Size:331K _fairchild_semi

HUF75542P3
HUF75542P3

HUF75333G3, HUF75333P3, HUF75333S3S, HUF75333S3 Data Sheet December 2001 66A, 55V, 0.016 Ohm. N-Channel UltraFET Features Power MOSFETs • 66A, 55V These N-Channel power MOSFETs • Simulation Models are manufactured using the - Temperature Compensated PSPICE® and SABER™ innovative UltraFET® process. This Models advanced process technology - SPICE and SABER Thermal Impedance Models

5.12. huf75631s3s.pdf Size:202K _fairchild_semi

HUF75542P3
HUF75542P3

HUF75631P3, HUF75631S3ST Data Sheet December 2001 33A, 100V, 0.040 Ohm, N-Channel, UltraFET® Power MOSFETs Packaging JEDEC TO-220AB JEDEC TO-263AB Features SOURCE DRAIN DRAIN (FLANGE) • Ultra Low On-Resistance GATE - rDS(ON) = 0.040?, VGS = 10V GATE • Simulation Models SOURCE - Temperature Compensated PSPICE® and SABER™ Electrical Models DRAIN (FLANGE) - Spice and SABER Therm

5.13. huf75329d3-s.pdf Size:225K _fairchild_semi

HUF75542P3
HUF75542P3

HUF75329D3, HUF75329D3S Data Sheet December 2001 20A, 55V, 0.026 Ohm, N-Channel UltraFET Features Power MOSFETs • 20A, 55V These N-Channel power MOSFETs • Simulation Models are manufactured using the - Temperature Compensated PSPICE® and SABER™ innovative UltraFET® process. This Models advanced process technology - SPICE and SABER Thermal Impedance Models achieves the lowest pos

5.14. huf75337g3_huf75337p3_huf75337s3s.pdf Size:226K _fairchild_semi

HUF75542P3
HUF75542P3

HUF75337G3, HUF75337P3, HUF75337S3S Data Sheet December 2001 75A, 55V, 0.014 Ohm, N-Channel UltraFET Features Power MOSFETs • 75A, 55V These N-Channel power MOSFETs • Simulation Models are manufactured using the - Temperature Compensated PSPICE® and SABER™ innovative UltraFET® process. This Models advanced process technology - SPICE and SABER Thermal Impedance Models achieves th

5.15. huf75637.pdf Size:201K _fairchild_semi

HUF75542P3
HUF75542P3

HUF75637P3, HUF75637S3S Data Sheet December 2001 44A, 100V, 0.030 Ohm, N-Channel, UltraFET® Power MOSFET Packaging JEDEC TO-220AB JEDEC TO-263AB Features SOURCE DRAIN DRAIN (FLANGE) • Ultra Low On-Resistance GATE - rDS(ON) = 0.030Ω, VGS = 10V GATE • Simulation Models SOURCE - Temperature Compensated PSPICE® and SABER™ Electrical Models DRAIN (FLANGE) - Spice and S

5.16. huf75307t3st.pdf Size:170K _fairchild_semi

HUF75542P3
HUF75542P3

HUF75307T3ST Data Sheet December 2001 2.6A, 55V, 0.090 Ohm, N-Channel UltraFET Features Power MOSFET • 2.6A, 55V This N-Channel power MOSFET is • Ultra Low On-Resistance, rDS(ON) = 0.090Ω manufactured using the innovative • Diode Exhibits Both High Speed and Soft Recovery UltraFET® process. This advanced process technology achieves the • Temperature Compensating PSPICE

5.17. huf75345g3_huf75345p3_huf75345s3s.pdf Size:326K _fairchild_semi

HUF75542P3
HUF75542P3

HUF75345G3, HUF75345P3, HUF75345S3S Data Sheet December 2009 75A, 55V, 0.007 Ohm, N-Channel UltraFET Features Power MOSFETs • 75A, 55V These N-Channel power MOSFETs • Simulation Models are manufactured using the - Temperature Compensated PSPICE® and SABER™ innovative UltraFET® process. This Models advanced process technology - Thermal Impedance SPICE and SABER Models achieves th

5.18. huf75645p3_huf75645s3s.pdf Size:204K _fairchild_semi

HUF75542P3
HUF75542P3

HUF75645P3, HUF75645S3S Data Sheet December 2001 75A, 100V, 0.014 Ohm, N-Channel, UltraFET® Power MOSFETs Packaging JEDEC TO-220AB JEDEC TO-263AB Features SOURCE DRAIN DRAIN • Ultra Low On-Resistance (FLANGE) GATE - rDS(ON) = 0.014?, VGS = 10V GATE • Simulation Models - Temperature Compensated PSPICE® and SABER™ SOURCE Electrical Models DRAIN - Spice and Saber Thermal Impedan

5.19. huf75229p3.pdf Size:216K _fairchild_semi

HUF75542P3
HUF75542P3

HUF75229P3 Data Sheet December 2001 44A, 50V, 0.022 Ohm, N-Channel UltraFET Features Power MOSFET • 44A, 50V This N-Channel power MOSFET is • Low On-Resistance, rDS(ON) = 0.022Ω manufactured using the innovative • Temperature Compensating PSPICE® Model UltraFET® process. This advanced process technology achieves the • Thermal Impedance SPICE Model lowest possible on-

5.20. huf75329g3_huf75329p3_huf75329s3s.pdf Size:252K _fairchild_semi

HUF75542P3
HUF75542P3

HUF75329G3, HUF75329P3, HUF75329S3S Data Sheet December 2001 49A, 55V, 0.024 Ohm, N-Channel UltraFET Features Power MOSFETs • 49A, 55V These N-Channel power MOSFETs • Ultra Low On-Resistance, rDS(ON) = 0.024? are manufactured using the • Temperature Compensating PSPICE® and SABER™ innovative UltraFET® process. This Models advanced process technology - Available on the web at: www.

5.21. huf75639s_f085a.pdf Size:230K _fairchild_semi

HUF75542P3
HUF75542P3

HUFA75639S3ST_F085A Data Sheet March 2012 56A, 100V, 0.025 Ohm, N-Channel Features UltraFET Power MOSFETs • 56A, 100V These N-Channel power MOSFETs • Peak Current vs Pulse Width Curve are manufactured using the • UIS Rating Curve innovative UltraFET® process. This advanced process technology • Related Literature achieves the lowest possible on-resistance per silicon ar

5.22. huf75623p3.pdf Size:98K _intersil

HUF75542P3
HUF75542P3

HUF75623P3 Data Sheet November 1999 File Number 4804 22A, 100V, 0.064 Ohm, N-Channel, UltraFET Power MOSFET Packaging Features JEDEC TO-220AB • Ultra Low On-Resistance - rDS(ON) = 0.064Ω, VGS = 10V SOURCE DRAIN • Simulation Models GATE - Temperature Compensated PSPICE® and SABER© Electrical Models - Spice and SABER© Thermal Impedance Models - www.intersil.com DRAIN (

5.23. huf75344.pdf Size:142K _intersil

HUF75542P3
HUF75542P3

HUF75344G3, HUF75344P3, HUF75344S3S Data Sheet January 2000 File Number 4402.7 75A, 55V, 0.008 Ohm, N-Channel UltraFET Features Power MOSFETs • 75A, 55V These N-Channel power MOSFETs • Simulation Models are manufactured using the - Temperature Compensated PSPICE® and SABER© innovative UltraFET™ process. Models This advanced process technology - Thermal Impedance PSPICE and S

5.24. huf75332.pdf Size:214K _intersil

HUF75542P3
HUF75542P3

HUF75332G3, HUF75332P3, HUF75332S3S Data Sheet June 1999 File Number 4489.3 60A, 55V, 0.019 Ohm, N-Channel UltraFET Features Power MOSFETs • 60A, 55V These N-Channel power MOSFETs • Simulation Models are manufactured using the - Temperature Compensated PSPICE® and SABER© innovative UltraFET™ process. Models This advanced process technology - SPICE and SABER Thermal Impedance

See also transistors datasheet: FQU4N50TU_WS , FQU5N40 , FDMC7582 , FQU5N60C , FDMQ8403 , FQU5P20 , FQU8P10 , FQU9N25 , IRF2807 , HUF75631S3S , FDB86135 , HUF75639S3 , FDD86252 , HUF75842P3 , HUF75852G3 , HUFA75307T3ST , HUFA75321D3S .

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