IXFC110N10P MOSFET transistor datasheet. Parameters and characteristics.

Type Designator: IXFC110N10P

Type of IXFC110N10P transistor: MOSFET

Type of control channel: N -Channel

Maximum power dissipation (Pd), W: 120

Maximum drain-source voltage |Uds|, V: 100V

Maximum gate-source voltage |Ugs|, V:

Maximum drain current |Id|, A: 60

Maximum junction temperature (Tj), °C:

Rise Time of IXFC110N10P transistor (tr), nS: 150ns

Drain-source Capacitance (Cd), pF:

Maximum drain-source on-state resistance (Rds), Ohm: 0.017

Package: ISOPLUS220

Equivalent transistors for IXFC110N10P

IXFC110N10P PDF documents for downloads:

1.1. ixfc110n10p.pdf Size:230K _ixys

IXFC 110N10P VDSS = 100 V PolarHVTM HiPerFET ID25 = 60 A Power MOSFET ? ? RDS(on) ? 17 m? ? ? ? ? ? ? ISOPLUS220TM ? trr ? 150 ns ? ? ? (Electrically Isolated Back Surface) N-Channel Enhancement Mode Fast Intrinsic Diode Avalanche Rated Symbol Test Conditions Maximum Ratings ISOPLUS220TM (IXFC) E153432 VDSS TJ = 25° C to 175° C 100 V VDGR TJ = 25° C to 175° C; RGS = 1 M? 100 V VGSS Continuous ±20 V G VGSM Transient ±30 V D S Isolated back surface ID25 TC = 25° C60 A IDM TC = 25° C, pulse width limited by TJM 250 A G = Gate D = Drain IAR TC = 25° C60 A S = Source EAR TC = 25° C40 mJ EAS TC = 25° C 1.0 J Features l Silicon chip on Direct-Copper-Bond dv/dt IS ?IDM, di/dt ?100 A/µs, VDD ?VDSS, 10 V/ns substrate TJ ?150° C, RG = 4 ? - High power dissipation - Isolated mounting surface PD TC = 25° C 120 W - 2500V electrical isolation TJ -55 ... +175 °C l Low drain to tab capacitance(<35pF) TJM 175 °C l Low RDS (on) HDMOSTM process Tstg -55 .

5.1. ixfc14n60p.pdf Size:229K _ixys

IXFC 14N60P VDSS = 600 V PolarHVTM HiPerFET ID25 = 8 A Power MOSFET ? ? RDS(on) ? 630 m? ? ? ? ? ? ? ISOPLUS220TM ? trr ? 200 ns ? ? ? (Electrically Isolated Back Surface) N-Channel Enhancement Mode Fast Intrinsic Diode Avalanche Rated Symbol Test Conditions Maximum Ratings ISOPLUS220TM (IXFC) E153432 VDSS TJ = 25° C to 150° C 600 V VDGR TJ = 25° C to 150° C; RGS = 1 M? 600 V VGS Continuous ± 30 V VGSM Tranisent ± 40 V G D S (Isolated back surface) ID25 TC = 25° C8 A IDM TC = 25° C, pulse width limited by TJM 42 A G = Gate D = Drain IAR TC = 25° C14 A S = Source EAR TC = 25° C23 mJ EAS TC = 25° C 0.9 J Features l dv/dt IS ?IDM, di/dt ?100 A/µs, VDD ?VDSS 10 V/ns Silicon chip on Direct-Copper-Bond substrate TJ ?150° C, RG = 4 ? - High power dissipation PD TC = 25° C 100 W - Isolated mounting surface - 2500V electrical isolation TJ -55 ... +150 °C l Low drain to tab capacitance(<35pF) TJM 150 °C l Low RDS (on) HDMOSTM process Tstg -55 .

5.2. ixfc16n50p.pdf Size:223K _ixys

IXFC 16N50P VDSS = 500 V PolarHVTM HiPerFET ID25 = 10 A Power MOSFET ? ? RDS(on) ? 450 m? ? ? ? ? ? ? ISOPLUS220TM ? trr ? 200 ns ? ? ? (Electrically Isolated Back Surface) N-Channel Enhancement Mode Fast Intrinsic Diode Avalanche Rated ISOPLUS220TM (IXFC) Symbol Test Conditions Maximum Ratings E153432 VDSS TJ = 25° C to 150° C 500 V VDGR TJ = 25° C to 150° C; RGS = 1 M? 500 V VGS Continuous ± 30 V G VGSM Transient ± 40 V D S Isolated back surface ID25 TC = 25° C10 A IDM TC = 25° C, pulse width limited by TJM 35 A G = Gate D = Drain IAR TC = 25° C10 A S = Source EAR TC = 25° C25 mJ EAS TC = 25° C 750 mJ dv/dt IS ?IDM, di/dt ?100 A/µs, VDD ?VDSS, 10 V/ns TJ ?150° C, RG = 10 ? Features l PD TC = 25° C 125 W Silicon chip on Direct-Copper-Bond substrate TJ -55 ... +150 °C - High power dissipation TJM 150 °C - Isolated mounting surface Tstg -55 ... +150 °C - 2500V electrical isolation l Low drain to tab capacitance(<35pF) TL 1.6 mm (0.062

See also transistors datasheet: IXFB60N80P , IXFB62N80Q3 , IXFB70N60Q2 , IXFB72N55Q2 , IXFB80N50Q2 , IXFB82N60P , IXFB82N60Q3 , IXFC10N80P , IRFZ46N , IXFC12N80P , IXFC13N50 , IXFC14N60P , IXFC14N80P , IXFC15N80Q , IXFC16N50P , IXFC16N80P , IXFC20N80P .

Keywords