View 74lvc125a datasheet:

74LVC125A LOW VOLTAGE CMOS QUAD BUS BUFFERS (3-STATE) HIGH PERFORMANCE 5V TOLERANT INPUTS HIGH SPEED: tPD = 4.8ns (MAX.) at VCC =3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| =IOL = 24mA (MIN) at VCC =3V SOP TSSOP PCI BUS LEVELS GUARANTEED AT 24 mA BALANCED PROPAGATION DELAYS: tPLH ? tPHL OPERATING VOLTAGE RANGE: ORDER CODES VCC(OPR) = 1.65V to 3.6V (1.2V Data PACKAGE TUBE T & R Retention) SOP 74LVC125AM 74LVC125AMTR PIN AND FUNCTION COMPATIBLE WITH TSSOP 74LVC125ATTR 74 SERIES 125 LATCH-UP PERFORMANCE EXCEEDS 500mA (JESD 17) It can be interfaced to 5V signal environment for ESD PERFORMANCE: inputs in mixed 3.3/5V system. HBM > 2000V (MIL STD 883 method 3015); These devices require the same 3-STATE control MM > 200V inp