View 74lvc1g07 5 datasheet:

INTEGRATED CIRCUITS DATA SHEET 74LVC1G07 Buffer with open-drain output Product specification 2003 Mar 07 Supersedes data of 2002 Oct 02 Philips Semiconductors Product specification Buffer with open-drain output 74LVC1G07 FEATURES DESCRIPTION • Wide supply voltage range from 1.65 to 5.5 V The 74LVC1G07 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most • High noise immunity advanced CMOS compatible TTL families. • Complies with JEDEC standard: The input can be driven from either 3.3 or 5 V devices. – JESD8-7 (1.65 to 1.95 V) This feature allows the use of this device as translator in a – JESD8-5 (2.3 to 2.7 V) mixed 3.3 and 5 V environment. – JESD8B/JESD36 (2.7 to 3.6 V). Schmitt trigger action at the input makes the circuit tolerant •