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pdtc114ee_4

DISCRETE SEMICONDUCTORS DATA SHEET M3D173 PDTC114EE NPN resistor-equipped transistor 1999 May 18 Product specification Supersedes data of 1998 Nov 26 Philips Semiconductors Product specification NPN resistor-equipped transistor PDTC114EE FEATURES PINNING • Built-in bias resistors R1 and R2 (typ. 10 k? each) PIN DESCRIPTION • Simplification of circuit design 1 base/input • Reduces number of components and board space. 2 emitter/ground 3 collector/output APPLICATIONS • Especially suitable for space reduction in interface and handbook, halfpage 3 3 driver circuits R1 1 • Inverter circuit configurations without use of external resistors. R2 2 12 DESCRIPTION Top view MAM346 NPN resistor-equipped transistor in an SC-75 plastic Fig.1 Simplified outline (SC-75) a

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