View st8472 datasheet:

ST84C72 STARTECH Printed June 19, 1996 An Company IDE INTERFACE WITH I/O DECODE DESCRIPTION PLCC package The ST84C72 is designed to replace all necessary TTL logics for 16 bit IDE interface and decode logic for floppy controller and serial / parallel I/O ports. A select A1 10 60 LPT2* pin is provided to select primary or secondary address A0 11 59 BD6 for hard and floppy decodes. On board crystal oscilla- VCC 12 58 LPT1* tor circuit provides 16, 9, and 1.8461 MHz clock A2 13 57 BD7 outputs for some floppy controllers and uart from 48 IDEEN* 14 56 CLK1.8 FCDEN* 15 55 SRESET* MHz external crystal connected to ST84C72. A7* 16 54 GN D XTAL1 17 53 SD7 XTAL2 18 52 SD6 ST84C72CJ68 GN D 19 51 SD5 CLK16 20 50 SD4 CLK9.6 21 49 SD3 FOR* 22 48 SD2 FCS* 23 47 SD1 FCR* 24 46