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ds1004

DS1004 5-Tap High Speed Silicon Delay Line www.dalsemi.com FEATURES PIN ASSIGNMENT All-silicon timing circuit 1 IN 8 VCC Five delayed clock phases per input 2 TAP 2 7 TAP 1 Precise tap-to-tap nominal delay tolerances of 0.75 and 1 ns TAP 4 3 6 TAP 3 Input-to-tap 1 delay of 5 ns GND 4 5 TAP 5 Nominal Delay tolerances of 1.5 ns DS1004M 8-Pin DIP (300-mil) Leading and trai

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 ds1004 Datasheet, Design, MOSFET, Power

 ds1004 RoHS, Compliant, Service, Triacs, Semiconductor

 ds1004 Database, Innovation, IC, Electricity

 


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