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AONV070V65G1 650V Enhancement Mode GaN Transistor Features Product Summary 650V Enhancement Mode GaN Transistor VDS @ TJ, max 650V Normal-off Design IDM 45A Ultra-low Qg RDS(ON) 70m No Qrr Qg, typ 6.9nC Low Inductance Eoss @ 400V 6 J Applications Server Power Supplies High-Frequency Converters Resonant Topologies Pin Configuration and Pin Names DFN 8x8 Pin Names D 1, 2, 3, 4 Gate 8 Drain 1, 2, 3, 4 8 Kelvin Source 7 G Source 5, 6 SK 7 Thermal Pad TP 5, 6 S (Connected to Source) Top View Bottom View Absolute Maximum Ratings Exceeding the Absolute Maximum Ratings may damage the device. TA = 25 C, unless otherwise stated. Symbol Parameter Maximum Units 650 (DC) VDS Drain-Source Voltage V 720 (AC) +6 / -4 (DC) VGS Gate-Source Voltage V +10 / -10 (AC) TA = 25 C 16(1) ID Continuous Drain Current A TA = 100 C