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Philips Semiconductors Product specification PowerMOS transistor PHP3055L Logic level FETGENERAL DESCRIPTION QUICK REFERENCE DATAN-channel enhancement mode logic SYMBOL PARAMETER MAX. UNITlevel field-effect power transistor in aplastic envelope featuring high VDS Drain-source voltage 60 Vavalanche energy capability, stable ID Drain current (DC) 12 Ablocking voltage, fast switching and Ptot Total power dissipation 50 Whigh thermal cycling performance RDS(ON) Drain-source on-state resistance 0.18 with low thermal resistance. Intendedfor use in Switched Mode PowerSupplies (SMPS), motor controlcircuits and general purposeswitching applications.PINNING - TO220AB PIN CONFIGURATION SYMBOLPIN DESCRIPTION dtab1 gate2 draing3 sourcetab drain1 2 3sLIMITING VALUESLimiting values in accordance with the Absolute Maximum System (IEC 134)SYMBO