View phb50n06t 1 datasheet:

Philips Semiconductors Product specification TrenchMOS? transistor PHB50N06T Standard level FET GENERAL DESCRIPTION QUICK REFERENCE DATA N-channel enhancement mode SYMBOL PARAMETER MAX. UNIT standard level field-effect power transistor in a plastic envelope VDS Drain-source voltage 55 V suitable for surface mounting. Using ID Drain current (DC) 50 A ’trench’ technology the device Ptot Total power dissipation 125 W features very low on-state resistance Tj Junction temperature 175 ?C and has integral zener diodes giving RDS(ON) Drain-source on-state 24 m? ESD protection up to 2kV. It is resistance VGS = 10 V intended for use in DC-DC converters and general purpose switching applications. PINNING - SOT404 PIN CONFIGURATION SYMBOL PIN DESCRIPTION d mb 1 gate 2 drain g 3