APT10057WVR MOSFET Equivalente. Reemplazo. Hoja de especificaciones. Principales características
Número de Parte: APT10057WVR
Tipo de FET: MOSFET
Polaridad de transistor: N
ESPECIFICACIONES MÁXIMAS
Pdⓘ - Máxima disipación de potencia: 450 W
|Vds|ⓘ - Voltaje máximo drenador-fuente: 1000 V
|Vgs|ⓘ - Voltaje máximo fuente-puerta: 30 V
|Id|ⓘ - Corriente continua de drenaje: 17.3 A
Tjⓘ - Temperatura máxima de unión: 150 °C
CARACTERÍSTICAS ELÉCTRICAS
trⓘ - Tiempo de subida: 13 nS
Cossⓘ - Capacitancia de salida: 595 pF
RDSonⓘ - Resistencia estado encendido drenaje a fuente: 0.57 Ohm
Encapsulados: TO267
Búsqueda de reemplazo de APT10057WVR MOSFET
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APT10057WVR datasheet
apt10057wvr.pdf
APT10057WVR 1000V 17.3A 0.570 POWER MOS V TO-267 Power MOS V is a new generation of high voltage N-Channel enhancement mode power MOSFETs. This new technology minimizes the JFET effect, increases packing density and reduces the on-resistance. Power MOS V also achieves faster switching speeds through optimized gate layout. Faster Switching 100% Avalanche Tested D Lo
apt10050jn.pdf
D G APT10050JN 1000V 20.5A 0.50 S ISOTOP "UL Recognized" File No. E145592 (S) POWER MOS IV SINGLE DIE ISOTOP PACKAGE N- CHANNEL ENHANCEMENT MODE HIGH VOLTAGE POWER MOSFETS MAXIMUM RATINGS All Ratings TC = 25 C unless otherwise specified. APT Symbol Parameter 10050JN UNIT VDSS Drain-Source Voltage 1000 Volts ID Continuous Drain Current @ TC = 25 C 20.5 Amps IDM, lLM
apt10050b2vfr.pdf
APT10050B2VFR APT10050LVFR 1000V 21A 0.500W B2VR POWER MOS V T-MAX Power MOS V is a new generation of high voltage N-Channel enhancement TO-264 mode power MOSFETs. This new technology minimizes the JFET effect, increases packing density and reduces the on-resistance. Power MOS V also achieves faster switching speeds through optimized gate layout. LVR Identical Specifica
apt10050jlc.pdf
APT10050JLC 1000V 19A 0.500 TM POWER MOS VI Power MOS VITM is a new generation of low gate charge, high voltage N-Channel enhancement mode power MOSFETs. Lower gate charge is achieved by optimizing the manufacturing process to minimize Ciss and Crss. Lower gate charge coupled with Power MOS VITM optimized gate layout, "UL Recognized" delivers exceptionally fast s
Otros transistores... APT1004RGN, APT1004RKN, APT10050B2VR, APT10050JN, APT10050JVFR, APT10050JVR, APT10050LVFR, APT10050LVR, RFP50N06, APT10086BVFR, APT10086BVR, APT10086SVR, APT10088HVR, APT10M07JVR, APT10M11B2VR, APT10M11JVR, APT10M11LVR
History: IRFN044 | IRFSZ42
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