HUF76423D3S Todos los transistores

HUF76423D3, HUF76423D3S Data Sheet December 2001 20A, 60V, 0.037 Ohm, N-Channel, Logic Level UltraFET Power MOSFETFairchild Packaging Features JEDEC TO-251AA JEDEC TO-252AA Ultra Low On-Resistance - rDS(ON) = 0.032 , VGS = 10V DRAIN DRAIN - rDS(ON) = 0.037 , VGS = 5V SOURCE (FLANGE) (FLANGE) DRAIN GATE Simulation Models - Temperature Compensated PSPICE and SABER

HUF76423P3, HUF76423S3S Data Sheet December 2001 33A, 60V, 0.035 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging JEDEC TO-220AB JEDEC TO-263AB Features DRAIN Ultra Low On-Resistance SOURCE (FLANGE) DRAIN - rDS(ON) = 0.030 , VGS = 10V GATE - rDS(ON) = 0.035 , VGS = 5V GATE Simulation Models - Temperature Compensated PSPICE and SABER SOURCE Elec

Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com Please note As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclatur

HUFA76429D3ST_F085 Data Sheet September 2010 20A, 60V, 0.027 Ohm, N-Channel, Logic Level UltraFET Power MOSFETs Packaging Features Ultra Low On-Resistance JEDEC TO-252AA - rDS(ON) = 0.023 , VGS = 10V - rDS(ON) = 0.027 , VGS = 5V DRAIN (FLANGE) Simulation Models - Temperature Compensated PSPICE and SABER Electriecal Models GATE - Spice and SABER Thermal Im

HUF76429D3, HUF76429D3S Data Sheet February 2005 20A, 60V, 0.027 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging JEDEC TO-251AA JEDEC TO-252AA Features Ultra Low On-Resistance DRAIN - rDS(ON) = 0.023 , VGS = 10V SOURCE (FLANGE) DRAIN - rDS(ON) = 0.027 , VGS = 5V GATE Simulation Models GATE - Temperature Compensated PSPICE and SABER SOURCE Elect

HUF76429P3, HUF76429S3S Data Sheet December 2001 44A, 60V, 0.025 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging Features JEDEC TO-220AB JEDEC TO-263AB Ultra Low On-Resistance DRAIN SOURCE - rDS(ON) = 0.022 , VGS = 10V DRAIN (FLANGE) GATE - rDS(ON) = 0.025 , VGS = 5V Simulation Models GATE - Temperature Compensated PSPICE and SABER SOURCE Elect

HUF76429D3, HUF76429D3S Data Sheet February 2005 20A, 60V, 0.027 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging JEDEC TO-251AA JEDEC TO-252AA Features Ultra Low On-Resistance DRAIN - rDS(ON) = 0.023 , VGS = 10V SOURCE (FLANGE) DRAIN - rDS(ON) = 0.027 , VGS = 5V GATE Simulation Models GATE - Temperature Compensated PSPICE and SABER SOURCE Elect

HUF76429P3, HUF76429S3S Data Sheet December 2001 44A, 60V, 0.025 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging Features JEDEC TO-220AB JEDEC TO-263AB Ultra Low On-Resistance DRAIN SOURCE - rDS(ON) = 0.022 , VGS = 10V DRAIN (FLANGE) GATE - rDS(ON) = 0.025 , VGS = 5V Simulation Models GATE - Temperature Compensated PSPICE and SABER SOURCE Elect