FDMD86100 Todos los transistores

 ..1. Size:296K  fairchild semi
 fdmd86100.pdf

February 2015 FDMD86100 Dual N-Channel Shielded Gate PowerTrench MOSFET 100 V, 39 A, 10.5 m Features General Description Common source configuration to eliminate PCB routing This package integrates two N-Channel devices connected internally in common-source configuration and incorporates Large source pad on bottom of package for enhanced Shielded Gate technology. This enables v

 9.1. Size:500K  fairchild semi
 fdmd8900.pdf

June 2015 FDMD8900 N-Channel PowerTrench MOSFET Q1 30 V, 66 A, 4 m Q2 30 V, 42 A, 5.5 m Features General Description Q1 N-Channel This devices utilizes two optimized N-ch FETs in a dual 3.3x5mm thermally enhanced power package. The HS Source and LS Max rDS(on) = 4 m at VGS = 10 V, ID = 19 A drain are internally connected providing a low source inductance Max rDS(on) =

 9.2. Size:676K  fairchild semi
 fdmd85100.pdf

March 2015 FDMD85100 Dual N-Channel PowerTrench MOSFET Q1 100 V, 48A, 9.9 m Q2 100 V, 48A, 9.9 m Features General Description Q1 N-Channel This device includes two 100V N-Channel MOSFETs in a dual Power (5 mm X 6 mm) package. HS source and LS Drain Max rDS(on) = 9.9 m at VGS = 10 V, ID = 10.4 A internally connected for half/full bridge, low source inductance Max rDS(on

 9.3. Size:274K  fairchild semi
 fdmd82100.pdf

June 2014 FDMD82100 Dual N-Channel Power Trench MOSFET 100 V, 25 A, 19 m Features General Description Max rDS(on) = 19 m at VGS = 10 V, ID = 7 A This device includes two 100V N-Channel MOSFETs in a dual Power (3.3 mm X 5 mm) package. HS source and LS Drain Max rDS(on) = 33 m at VGS = 6 V, ID = 5.5 A internally connected for half/full bridge, low source inductance Ideal

 9.4. Size:234K  fairchild semi
 fdmd84100.pdf

January 2014 FDMD84100 Dual N-Channel PowerTrench MOSFET 100 V, 21 A, 20 m Features General Description Max rDS(on) = 20 m at VGS = 10 V, ID = 7 A This package integrates two N-Channel devices connected internally in common-source configuration. This enables very Max rDS(on) = 32 m at VGS = 6 V, ID = 5.5 A low package parasitics and optimized thermal path to the Ideal fo

 9.5. Size:538K  fairchild semi
 fdmd8280.pdf

October 2014 FDMD8280 Dual N-Channel Power Trench MOSFET 80 V, 40 A, 8.2 m Features General Description Max rDS(on) = 8.2 m at VGS = 10 V, ID = 11 A This device includes two 80V N-Channel MOSFETs in a dual Power (3.3 mm X 5 mm) package. HS source and LS Drain Max rDS(on) = 11 m at VGS = 8 V, ID = 9.5 A internally connected for half/full bridge, low source inductance Ide

 9.6. Size:335K  fairchild semi
 fdmd82100l.pdf

June 2014 FDMD82100L Dual N-Channel PowerTrench MOSFET 100 V, 24 A, 19.5 m Features General Description Max rDS(on) = 19.5 m at VGS = 10 V, ID = 7 A This device includes two 100V N-Channel MOSFETs in a dual Power (3.3 mm X 5 mm) package. HS source and LS Drain Max rDS(on) = 30 m at VGS = 4.5 V, ID = 5.7 A internally connected for half/full bridge, low source inductance

 9.7. Size:688K  onsemi
 fdmd8560l.pdf

Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com Please note As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclatur

 9.8. Size:706K  onsemi
 fdmd8530.pdf

Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com Please note As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclatur

 9.9. Size:653K  onsemi
 fdmd8540l.pdf

MOSFET Dual, N-Channel, POWERTRENCH) Q1 40 V, 156 A, 1.5 mW Q2 40 V, 156 A, 1.5 mW FDMD8540L www.onsemi.com General Description This device includes two 40 V N-Channel MOSFETs in a dual VDS rDS(ON) MAX ID MAX Power (5 mm x 6 mm) package. HS source and LS drain internally connected for half/full bridge, low source inductance package, low 40 V 1.5 mW @ 10 V 156 A rDS(on)/Qg FOM