STP4403 MOSFET. Datasheet. Equivalente. Reemplazo. Hoja de especificaciones. Principales características
Número de Parte: STP4403
Tipo de FET: MOSFET
Polaridad de transistor: P
ESPECIFICACIONES MÁXIMAS
Pdⓘ - Máxima disipación de potencia: 2.8 W|Vds|ⓘ - Voltaje máximo drenador - fuente: 20 V
|Vgs|ⓘ - Voltaje máximo fuente - puerta: 12 V
|Id|ⓘ - Corriente continua de drenaje: 10 A
Tjⓘ - Temperatura máxima de unión: 150 °C
CARACTERÍSTICAS ELÉCTRICAS
|Vgs(th)|ⓘ - Tensión umbral entre puerta y fuente: 0.9 VQgⓘ - Carga de la puerta: 30 nC
trⓘ - Tiempo de subida: 45 nS
Cossⓘ - Capacitancia de salida: 520 pF
Rds(on)ⓘ - Resistencia estado encendido drenaje a fuente: 0.027 Ohm
Paquete / Cubierta: SOP-8
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STP4403 Datasheet (PDF)
stp4403.pdf
STP4403 P Channel Enhancement Mode MOSFET - 10.0A DESCRIPTION STP4403 is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application, such as cellular phone and n
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GreenProductSTB/P440SaS mHop Microelectronics C orp.Ver 1.0N-Channel Logic Level Enhancement Mode Field Effect TransistorFEATURESPRODUCT SUMMARYSuper high dense cell design for extremely low RDS(ON).RDS(ON) (m) MaxVDSS IDHigh power and current handling capability.8 @ VGS=10VTO-220 & TO-263 package.40V 65A11.5 @ VGS=4.5VS TB S E R IE S S TP S E R IE STO-263
stp4407a.pdf
STP4407A P Channel Enhancement Mode MOSFET - 10A DESCRIPTION The STP4407A is the P-Channel logic enhancement mode power field effect transistor is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone an
stp4407.pdf
STP4407 P Channel Enhancement Mode MOSFET - 10A DESCRIPTION The STP4407 is the P-Channel logic enhancement mode power field effect transistor is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone and no
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