HUFA76619D3S Todos los transistores

 ..1. Size:214K  fairchild semi
 hufa76619d3st hufa76619d3 hufa76619d3s.pdf

 7.1. Size:217K  fairchild semi
 hufa76639p3 hufa76639s3s hufa76639s3st.pdf

HUFA76639P3, HUFA76639S3S Data Sheet January 2002 50A, 100V, 0.027 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging Features JEDEC TO-220AB JEDEC TO-263AB Ultra Low On-Resistance SOURCE DRAIN - rDS(ON) = 0.026 , VGS = 10V DRAIN (FLANGE) GATE - rDS(ON) = 0.027 , VGS = 5V Simulation Models GATE - Temperature Compensated PSPICE and SABER SOURCE El

 7.2. Size:217K  fairchild semi
 hufa76645p3 hufa76645s3s hufa76645s3st.pdf

HUFA76645P3, HUFA76645S3S Data Sheet January 2002 75A, 100V, 0.015 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging Features JEDEC TO-220AB JEDEC TO-263AB Ultra Low On-Resistance SOURCE DRAIN - rDS(ON) = 0.014 , VGS = 10V DRAIN (FLANGE) GATE - rDS(ON) = 0.015 , VGS = 5V Simulation Models GATE - Temperature Compensated PSPICE and SABER Electrical

 7.3. Size:302K  fairchild semi
 hufa76645s3st f085.pdf

HUFA76645S3ST_F085 Data Sheet September 2010 75A, 100V, 0.015 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging Features Ultra Low On-Resistance JEDEC TO-263AB - rDS(ON) = 0.014 , VGS = 10V - rDS(ON) = 0.015 , VGS = 5V DRAIN Simulation Models (FLANGE) - Temperature Compensated PSPICE and SABER Electrical Models GATE - Spice and SABER Thermal Imped

 7.4. Size:202K  fairchild semi
 hufa76629d3 hufa76629d3st.pdf

HUFA76629D3, HUFA76629D3S Data Sheet January 2002 20A, 100V, 0.054 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging JEDEC TO-251AA JEDEC TO-252AA Features Ultra Low On-Resistance DRAIN SOURCE (FLANGE) - rDS(ON) = 0.052 , VGS = 10V DRAIN - rDS(ON) = 0.054 , VGS = 5V GATE GATE Simulation Models SOURCE - Temperature Compensated PSPICE and SABER Elect

 7.5. Size:208K  fairchild semi
 hufa76609d3st hufa76609d3 hufa76609d3s.pdf

 7.6. Size:217K  fairchild semi
 hufa76633p3 hufa76633s3s hufa76633s3st.pdf

HUFA76633P3, HUFA76633S3S Data Sheet January 2002 38A, 100V, 0.036 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging Features JEDEC TO-220AB JEDEC TO-263AB Ultra Low On-Resistance SOURCE DRAIN - rDS(ON) = 0.035 , VGS = 10V DRAIN (FLANGE) GATE - rDS(ON) = 0.036 , VGS = 5V Simulation Models GATE - Temperature Compensated PSPICE and SABER SOURCE El

 7.7. Size:828K  cn vbsemi
 hufa76609d3.pdf

HUFA76609D3 www.VBsemi.tw N-Channel 100 V (D-S) MOSFET FEATURES PRODUCT SUMMARY DT-Trench Power MOSFET VDS (V) RDS(on) ( )ID (A) 175 C Junction Temperature 0.115 at VGS = 10 V 15 100 % Rg Tested 100 0.120 at VGS = 6 V 15 APPLICATIONS Primary Side Switch TO-251 D G S G D S N-Channel MOSFET Top View ABSOLUTE MAXIMUM RATINGS (TC = 25 C, unless otherwi