RF1S540 Todos los transistores

 ..1. Size:52K  harris semi
 rf1s540.pdf

IRF540, IRF541, IRF542, Semiconductor IRF543, RF1S540, RF1S540SM 25A and 28A, 80V and 100V, 0.077 and 0.100 Ohm, N-Channel Power MOSFETs November 1997 Features Description 25A and 28A, 80V and 100V These are N-Channel enhancement mode silicon gate power field effect transistors. They are advanced power rDS(ON) = 0.077 and 0.100 MOSFETs designed, tested, and guaranteed to

 0.1. Size:112K  fairchild semi
 irf540 rf1s540sm.pdf

IRF540, RF1S540SM Data Sheet January 2002 28A, 100V, 0.077 Ohm, N-Channel Power Features MOSFETs 28A, 100V These are N-Channel enhancement mode silicon gate rDS(ON) = 0.077 power field effect transistors. They are advanced power Single Pulse Avalanche Energy Rated MOSFETs designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avala

 9.1. Size:373K  fairchild semi
 rfg50n06 rfp50n06 rf1s50n06sm.pdf

RFG50N06, RFP50N06, RF1S50N06SM Data Sheet January 2002 50A, 60V, 0.022 Ohm, N-Channel Power Features MOSFETs 50A, 60V These N-Channel power MOSFETs are manufactured using rDS(ON) = 0.022 the MegaFET process. This process, which uses feature Temperature Compensating PSPICE Model sizes approaching those of LSI integrated circuits gives optimum utilization of silico

 9.2. Size:74K  intersil
 irf530 rf1s530sm.pdf

IRF530, RF1S530SM Data Sheet November 1999 File Number 1575.6 14A, 100V, 0.160 Ohm, N-Channel Power Features MOSFETs 14A, 100V These are N-Channel enhancement mode silicon gate rDS(ON) = 0.160 power field effect transistors. They are advanced power Single Pulse Avalanche Energy Rated MOSFETs designed, tested, and guaranteed to withstand a specified level of energy in th

 9.3. Size:154K  intersil
 rfg50n06le rfp50n06le rf1s50n06lesm.pdf

RFG50N06LE, RFP50N06LE, RF1S50N06LESM Data Sheet October 1999 File Number 4072.3 50A, 60V, 0.022 Ohm, Logic Level Features N-Channel Power MOSFETs 50A, 60V These N-Channel enhancement mode power MOSFETs are rDS(ON) = 0.022 manufactured using the latest manufacturing process Temperature Compensating PSPICE Model technology. This process, which uses feature sizes approa