ME2324D MOSFET. Datasheet. Equivalente. Reemplazo. Hoja de especificaciones. Principales características
Número de Parte: ME2324D
Tipo de FET: MOSFET
Polaridad de transistor: N
ESPECIFICACIONES MÁXIMAS
Pdⓘ - Máxima disipación de potencia: 0.35 W|Vds|ⓘ - Voltaje máximo drenador - fuente: 25 V
|Vgs|ⓘ - Voltaje máximo fuente - puerta: 8 V
|Id|ⓘ - Corriente continua de drenaje: 0.71 A
Tjⓘ - Temperatura máxima de unión: 150 °C
CARACTERÍSTICAS ELÉCTRICAS
trⓘ - Tiempo de subida: 6 nS
Cossⓘ - Capacitancia de salida: 26 pF
Rds(on)ⓘ - Resistencia estado encendido drenaje a fuente: 0.4 Ohm
Paquete / Cubierta: SOT23
- Selección de transistores por parámetros
ME2324D Datasheet (PDF)
me2324d me2324d-g.pdf

ME2324D/ME2324D-G N-Channel 25V (D-S) MOSFET, ESD Protected GENERAL DESCRIPTION FEATURES The ME2324D is the N-Channel logic enhancement mode power RDS(ON)400m@VGS=4.5V field effect transistors are produced using high cell density , DMOS RDS(ON)450m@VGS=2.7V trench technology. This high density process is especially tailored to ESD Protection HBM >1KV minimize
me2323d me2323d-g.pdf

ME2323D/ME2323D-G P-Channel 20-V (D-S) MOSFETESD Protection GENERAL DESCRIPTION FEATURES The ME2323D(-G) is the P-Channel logic enhancement mode power RDS(ON) 50m@VGS=-4.5V field effect transistors are produced using high cell density, DMOS RDS(ON) 65m@VGS=-2.5V trench technology. This high density process is especially tailored to RDS(ON) 75m@VGS=-1.8
me2328 me2328-g.pdf

ME2328/ME2328-G N - Channel 105-V (D-S) MOSFET GENERAL DESCRIPTION FEATURES RDS(ON)270m@VGS=10V The ME2328 is the N-Channel logic enhancement mode power field RDS(ON)340m@VGS=4.5V effect transistors are produced using high cell density, DMOS trench Super high density cell design for extremely low RDS(ON) technology. This high density process is especiall
me2320d me2320d-g.pdf

ME2320D/ME2320D-G N-Channel 20V (D-S) MOSFET , ESD Protection GENERAL DESCRIPTION FEATURES The ME2320D is the N-Channel logic enhancement mode power RDS(ON)=21m@VGS=4.5V field effect transistors are produced using high cell density, DMOS RDS(ON)=25 m@VGS=2.5V trench technology. This high density process is especially tailored to RDS(ON)=40 m@VGS=1.8V minimize on-st
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History: P3010BV | CTM09N20 | SUD80460E | NVTFS002N04CL | IPP076N12N3G | SST65R280S2E | NCE4080D
History: P3010BV | CTM09N20 | SUD80460E | NVTFS002N04CL | IPP076N12N3G | SST65R280S2E | NCE4080D



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