NDS331N Todos los transistores

 ..1. Size:63K  fairchild semi
 nds331n.pdf

July 1996 NDS331N N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description Features These N-Channel logic level enhancement mode power field 1.3 A, 20 V. RDS(ON) = 0.21 @ VGS= 2.7 V effect transistors are produced using Fairchild's proprietary, RDS(ON) = 0.16 @ VGS= 4.5 V. high cell density, DMOS technology. This very high density process is especia

 0.1. Size:877K  cn vbsemi
 nds331n-nl.pdf

NDS331N-NL www.VBsemi.tw N-Channel 20 V (D-S) MOSFET FEATURES PRODUCT SUMMARY Halogen-free According to IEC 61249-2-21 VDS (V) RDS(on) ( ) ID (A)e Qg (Typ.) Definition 0.028 at VGS = 4.5 V TrenchFET Power MOSFET 6a 100 % Rg Tested 20 0.042 at VGS = 2.5 V 6a 8.8 nC Compliant to RoHS Directive 2002/95/EC 0.050 at VGS = 1.8 V 5.6 APPLICATIONS DC/DC Con

 9.1. Size:62K  fairchild semi
 nds336p.pdf

June 1997 NDS336P P-Channel Logic Level Enhancement Mode Field Effect Transistor General Description Features SuperSOTTM-3 P-Channel logic level enhancement mode power -1.2 A, -20 V, RDS(ON) = 0.27 @ VGS= -2.7 V field effect transistors are produced using Fairchild's RDS(ON) = 0.2 @ VGS = -4.5 V. proprietary, high cell density, DMOS technology. This very high Very low level

 9.2. Size:62K  fairchild semi
 nds335n.pdf

July 1996 NDS335N N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description Features These N -Channel logic level enhancement mode power field 1.7 A, 20 V. RDS(ON) = 0.14 @ VGS= 2.7 V effect transistors are produced using Fairchild's proprietary, RDS(ON) = 0.11 @ VGS= 4.5 V. high cell density, DMOS technology. This very high density process is espec

 9.3. Size:84K  fairchild semi
 nds332p.pdf

June 1997 NDS332P P-Channel Logic Level Enhancement Mode Field Effect Transistor General Description Features -1 A, -20 V, RDS(ON) = 0.41 @ VGS= -2.7 V These P-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high RDS(ON) = 0.3 @ VGS = -4.5 V. cell density, DMOS technology. This very high density process is Very

 9.4. Size:851K  cn vbsemi
 nds336p.pdf

 9.5. Size:869K  cn vbsemi
 nds332p-nl.pdf

NDS332P-NL www.VBsemi.tw P-Channel 20-V (D-S) MOSFET FEATURES MOSFET PRODUCT SUMMARY Halogen-free According to IEC 61249-2-21 VDS (V) RDS(on) ( )ID (A)a Qg (Typ.) Definition 0.035 at VGS = - 10 V - 5e TrenchFET Power MOSFET e - 20 0.043 at VGS = - 4.5 V - 5 10 nC 100 % Rg Tested 0.061 at VGS = - 2.5 V - 4.8 Compliant to RoHS Directive 2002/95/EC APPLICATIONS