Table of Contents

• Basic MOSFET Parameters
• How Key Parameters Affect Each Other
• Advanced Physical Effects
• How Temperature Changes Things
• Working with the Driver
• Picking the Right Circuit Type
• New Materials (SiC, GaN)
• Practical Debugging Tips
• Step-by-Step Guide to Choose

Basic MOSFET Parameters

Static Parameters (When it's Fully On or Off)

• Rds(on) - Resistance when turned on. Main cause of power loss when just sitting on: P_loss = I² × Rds(on)
• Vgs(th) - Turn-on voltage. The minimum gate voltage needed to start conducting.
• Id(max) - Maximum continuous current it can handle.
• Vds(max) - Maximum voltage between drain and source.
• Tj(max) - Maximum temperature inside the chip.
• SOA - Safe Operating Area (shows safe combinations of current, voltage, and time).

Dynamic Parameters (When Switching On/Off)

• Qg - Total Gate Charge. How much "push" is needed to switch it.
• Ciss, Coss, Crss - Input, Output, and Reverse capacitances. Like little internal capacitors.
• td(on), tr, td(off), tf - Turn-on delay, rise time, turn-off delay, fall time. How fast it switches.
• Qrr - Body diode reverse recovery charge. Important in bridge circuits.
• Eoss - Energy stuck in the output capacitance.

How Key Parameters Affect Each Other

1. Rds(on) vs. Qg (and Ciss) (The Big Trade-off)

To get lower resistance (Rds(on)), you need a bigger chip or more cells inside. This makes the gate "heavier" to drive (higher Ciss and Qg).

Result: A MOSFET with very low Rds(on) will need a lot of energy (high Qg) to switch fast, especially at high frequencies. You'll need a stronger driver.

Bottom Line: Choose between low power loss when on (Rds(on)) and low power loss when switching (Qg).

2. Vds(max) vs. Rds(on)

To handle higher voltages, the silicon inside needs to be thicker and more resistive. This makes Rds(on) worse.

Result: A 600V MOSFET will have much higher Rds(on) than a 60V one, even if they are the same size.

Bottom Line: Higher voltage MOSFETs are naturally worse at conducting current efficiently.

3. Switching Speed vs. Stability and Noise

Fast switching (short tr, tf) needs low Qg and a strong driver. But this causes rapid voltage and current changes (high dV/dt, di/dt).

Result: More electromagnetic interference (EMI), risk of accidental turn-on via Crss, and voltage spikes on stray inductances.

Bottom Line: Wanting high frequency and low switching loss fights with the need for low noise and reliability. Often need a balance using snubber circuits.

4. Vgs(th) vs. Noise Immunity and Ease of Use

Low Vgs(th) (like 1-2V) is easy to drive directly from a microcontroller (3.3V, 5V). But it's more likely to turn on accidentally from noise spikes on the gate.

Result: MOSFETs for digital control have low Vgs(th) but need careful PCB layout. Standard power MOSFETs often have Vgs(th) around 3-4V for more ruggedness.

Bottom Line: Choose between easy driving and reliability in a noisy environment.

5. Qrr vs. Technology (Planar vs. Superjunction)

The built-in body diode has a Reverse Recovery Charge (Qrr). Switching this diode causes losses and current spikes. Superjunction tech (like CoolMOS) gives much lower Rds(on) at high voltages, but often has high Qrr and nonlinear Coss.

Result: In circuits where this diode conducts (like half-bridges), high Qrr is a big problem. Superjunction MOSFETs are great for low Rds(on) but bad for Qrr, limiting where you can use them easily.

Bottom Line: For bridge circuits, check Qrr, not just Rds(on).

Advanced Physical Effects and Limits

Parasitic Bipolar Transistor and Latch-up

Inside every MOSFET is a hidden NPN transistor. If current changes too fast (high di/dt) or during diode recovery, voltage can build up across an internal resistor (R_body). If it exceeds ~0.7V, the parasitic transistor turns ON. The MOSFET shorts out between drain and source, ignoring the gate. Result: instant destruction.

How to avoid: Minimize drain-source loop inductance. Sometimes use slower turn-off (higher Rgoff). Choose parts with robust technology.

Gate-Drain Capacitance Hysteresis

In Superjunction MOSFETs, after fast turn-off of high current, the Rds(on) can be temporarily higher in the next cycle because charge hasn't cleared yet.

Dynamic Rds(on)

The real resistance during a pulse can be different from the DC value due to heating and charge trapping effects.

Bias Temperature Instability (BTI)

Running with high gate voltage for a long time (especially when hot) can slowly shift the turn-on voltage Vgs(th), usually making it higher. Over time, the MOSFET might not turn on fully with the same driver voltage, causing more loss and overheating.

How to avoid: Use a driver with good voltage margin (e.g., 10V instead of 5V). Choose reputable parts.

Avalanche Rating (UIS)

This is the absolute maximum for a single event under controlled conditions. Repeated avalanches (e.g., from inductive loads) cause:

• Localized overheating at breakdown spots. Silicon melts, creating defects.
• Increased gate leakage, lower Vgs(th).
• Uncontrollable increase in Rds(on).

Golden Rule: Design your system so it NEVER goes into avalanche during normal operation. The UIS rating is for emergency survival, not for regular use.

How Temperature Changes Things

Negative Feedback (Stabilizing)

• Vgs(th) goes DOWN as temperature goes up (~ -6 mV/°C)
• If it overheats, it becomes easier to turn on. This can sometimes prevent thermal runaway.

Positive Feedback (Destabilizing)

• Rds(on) goes UP as temperature goes up (+50%...+100% for a 75°C rise).
• More loss → hotter → higher Rds(on) → even more loss. A vicious cycle.
• The Safe Operating Area (SOA) shrinks when hotter.

Practical Rule

Always calculate losses and heatsinks for the maximum expected junction temperature (usually 100-150°C), NOT for room temperature.

Working with the Driver and Stray Elements

Stray Inductances

Inductance	Effect	Solution
Ls (Source)	During fast switching, current through Ls creates a voltage spike. This voltage fights against the gate drive Vgs, making it harder to turn on and slowing things down.	Use packages with a Kelvin source connection.
Ld (Drain)	Forms an LC circuit with Coss. Turning off high current creates a dangerous voltage spike: Vds_spike = Ld * |di/dt|. Can exceed Vds(max).	Minimize the drain-source loop area. Use snubbers. Pick a MOSFET with voltage headroom.
Lg (Gate)	Works with Ciss to slow down gate charging, increasing switching times and losses. Can cause gate ringing.	Keep gate traces as short and wide as possible. Place the driver right next to the MOSFET.

Bottom Line: Real-world switching performance is always worse than the datasheet. A low-inductance package is often more important than a small difference in Rds(on).

The Miller Effect and Qgd Charge

Charging the Crss (Cgd) capacitance creates current through the driver when Vds is changing. A weak driver with high output resistance will get "stuck" on the Miller plateau longer, increasing switching time/loss. A strong driver blasts through the plateau fast but creates huge di/dt and dV/dt (noise). This is why sometimes a two-stage gate driver or variable gate resistor is used: fast to the plateau, slower across it (to control dV/dt), then fast again to fully turn on.

Asymmetric Turn-On / Turn-Off

Most drivers can sink more current than they source (or vice-versa), leading to different turn-on and turn-off times. Turn-off loss is often the bigger problem. Use different resistors (Rgon vs Rgoff) to balance.

External Gate-Source Capacitor (Cgs)

• Adding a small capacitor from gate to source slows switching and damps ringing.
• Consequence: It increases the effective gate charge Qg the driver must handle. Driver can overload, switching losses go up.
• Better approach: First optimize layout (reduce inductance), use a series resistor. Add a capacitor only as a last resort.

Snubber Circuits

• An RC snubber on the drain suppresses spikes and ringing, saving from breakdown.
• Consequence: It wastes power, reduces system efficiency, and can increase turn-on time (snubber cap discharges into the FET).
• Better approach: Find balance between clean waveforms and efficiency. Often better to spend time improving layout than adding snubbers.

Low-Power Driver Supply

• High impedance of the driver's power supply at high frequencies.
• Consequence: Instability, ripple, or simply not enough "juice" directly affects switching times.
• How to fix: Even with a stable 12V supply, if the bypass capacitor is far away (adds inductance), the gate voltage can "sag" during switching, slowing it down and increasing loss.

Picking the Right Circuit Type

Circuit	Critical Parameters	Less Important	Example Use
High-side switch (Buck, Boost)	Qg, Rds(on), Crss	Qrr, Vgs(th)	Switch-mode power supplies
Low-side sync switch	Rds(on) (min), Qrr (diode), Coss	Qg, Vgs(th)	Synchronous rectifiers
Half-bridge, H-bridge	Qrr, SOA, Crss	Rds(on), Vgs(th)	Inverters, motor drivers
Resonant converters (LLC)	Coss/Eoss, Rds(on), Qg	Qrr, Crss	Efficient server PSUs, UPS
Load switch (DC)	Rds(on)	All dynamic parameters	Power relays, static switches

New Materials: SiC and GaN

Material	Key Advantage	Main Trade-off	Best For
Silicon (Si)	Cheap, mature technology	Limited frequency, higher losses	General use, up to ~100 kHz
Silicon Carbide (SiC)	High voltage capability, low Qrr, high temp	High cost, gate sensitivity	High-voltage converters (600V+), 100 kHz - 1 MHz
Gallium Nitride (GaN)	Excellent dynamics (very low Qg, Qrr), up to 10 MHz+	Very high cost, low Vgs(th), narrow Vgs range	Ultra-compact converters, wireless power

Practical Debugging: What to Look at on the Oscilloscope

Key Waveforms

Vgs (Gate-Source):

• Good: Clean edges, Miller plateau (for high-side), no ringing.
• Problems:
  • Ringing - gate resistance too low or Lg too high.
  • Sag during plateau - driver is too weak.
  • Low amplitude - problem with driver power supply.

Vds (Drain-Source):

• Good: Controlled dV/dt, spikes < 30% of bus voltage.
• Problems:
  • Large spikes - drain loop inductance Ld is too big.
  • Ringing - resonance between Coss and stray inductance.
  • "Shoulder" during turn-on - charging Coss (normal for ZVS).

Id (Drain Current):

• Problems:
  • Spike at turn-on - charging Qrr of a diode in bridge.
  • Current rises before Vds falls - operating in linear region (high loss).

How to Measure

Use probes with very short ground leads or differential probes. A standard long "alligator clip" ground will ruin the measurement due to its inductance.

Diagnosing MOSFET Problems

Problem	Likely Cause (Parameter Link)	What to Try
Overheats at low frequency	Rds(on) is too high for the current. Didn't account for Rds(on) increase with heat.	Bigger heatsink, MOSFET with lower Rds(on), check actual Vgs (is it high enough to fully turn on?).
Overheats at high frequency	Switching losses dominate. Qg or Qrr is too high.	Stronger driver, optimize dead-time, choose MOSFET with better FOM (Rds(on)*Qg).
Blows up during turn-off	Vds(max) exceeded due to spike. Drain inductance Ld too high.	Add a snubber, improve layout to reduce Ld, use MOSFET with higher Vds rating, slow down turn-off (increase Rgoff).
False turn-on, shoot-through	dV/dt noise coupling through Crss. Neighbour switch is too fast.	Increase dead-time, slow down switching (increase Rgon/Rgoff), use MOSFET with lower Crss.
Gate ringing	Resonance between Lg and Ciss. Gate resistance too low, traces too long.	Add small series resistor (10-100 Ohm) near gate, shorten traces, as last resort add small Cgs cap (<=1 nF).
Rds(on) creeps up over time	Degradation from BTI or partial avalanche events.	Check if max gate voltage is exceeded, ensure stable gate drive, check for Vds spikes.

Step-by-Step Guide to Choose

1. Define system needs:
   • Max Vds and Id
   • Switching frequency
   • Circuit type (topology)
   • Ambient temperature
2. Figure out the main loss type:
   • Low frequency → conduction loss (Rds(on)) matters most.
   • High frequency → switching loss (Qg, Qrr) matters most.
   • Bridge circuit → diode loss (Qrr) matters most.
3. Choose package:
   • High power → TO220, TO247, D2PAK
   • High frequency → Low inductance packages (LFPAK, DirectFET, QFN)
4. Find candidates:
   • Search by key parameters and Figure of Merit (FOM).
   • Note manufacturer's optimization (Fast Switching, Sync Rec, High Voltage).
5. Study datasheet:
   • Graphs of Rds(on) vs. Temperature
   • Graphs of Qg vs. Vgs
   • SOA at max temperature
   • How Coss changes with Vds
6. Calculate loss and temperature:
   • Ptot = Pcond + Psw - total loss
   • Pcond = Irms² × Rds(on)@Tjmax - conduction loss
   • Psw = fsw × (Eon + Eoff) - switching loss
   • Tj = Ta + Rth(j-a) × Ptot - junction temperature
7. Design the support circuit:
   • Pick a driver with enough current.
   • Calculate gate resistors (Rgon, Rgoff).
   • Place components close together (short traces).
8. Build a prototype and measure:
   • Waveforms of Vgs, Vds, Id
   • Case temperature in worst-case condition
   • Stress tests: startup, short circuit, load dump

Key Takeaways

• Choosing a MOSFET is always a trade-off.
• There's no single "best" MOSFET, only the best for your specific job.
• Datasheet numbers are for the chip alone; real circuits are worse because of stray parts.
• Heat is the #1 enemy of efficiency and reliability.
• New tech (SiC, GaN) solves old problems but brings new ones.
• Being able to read an oscilloscope is often more important than reading a datasheet.

For exact numbers, always check the latest datasheets from manufacturers.