All MOSFET. HUF76619D3S Datasheet

 

HUF76619D3S MOSFET. Datasheet pdf. Equivalent

Type Designator: HUF76619D3S

Type of Transistor: MOSFET

Type of Control Channel: N -Channel

Maximum Power Dissipation (Pd): 75 W

Maximum Drain-Source Voltage |Vds|: 100 V

Maximum Gate-Source Voltage |Vgs|: 16 V

Maximum Drain Current |Id|: 18 A

Maximum Junction Temperature (Tj): 175 °C

Maximum Drain-Source On-State Resistance (Rds): 0.087 Ohm

Package: TO252AA

HUF76619D3S Transistor Equivalent Substitute - MOSFET Cross-Reference Search

HUF76619D3S Datasheet (PDF)

1.1. huf76619d3-s.pdf Size:220K _fairchild_semi

HUF76619D3S
HUF76619D3S

HUF76619D3, HUF76619D3S Data Sheet December 2001 18A, 100V, 0.087 Ohm, N-Channel, Logic Level UltraFET® Power MOSFET Packaging JEDEC TO-251AA JEDEC TO-252AA Features • Ultra Low On-Resistance DRAIN DRAIN SOURCE (FLANGE) (FLANGE) - rDS(ON) = 0.085Ω, VGS = 10V DRAIN GATE - rDS(ON) = 0.087Ω, VGS = 5V GATE • Simulation Models SOURCE - Temperature Compensated PSPICE®

4.1. huf76609d3s.pdf Size:220K _fairchild_semi

HUF76619D3S
HUF76619D3S

HUF76609D3, HUF76609D3S Data Sheet December 2001 10A, 100V, 0.165 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging Features JEDEC TO-251AA JEDEC TO-252AA Ultra Low On-Resistance DRAIN DRAIN - rDS(ON) = 0.160?, VGS = 10V SOURCE (FLANGE) (FLANGE) DRAIN GATE - rDS(ON) = 0.165?, VGS = 5V GATE Simulation Models - Temperature Compensated PSPICE and SABER SOURCE Elec

4.2. huf76633p3-s3s.pdf Size:223K _fairchild_semi

HUF76619D3S
HUF76619D3S

HUF76633P3, HUF76633S3S Data Sheet December 2001 38A, 100V, 0.036 Ohm, N-Channel, Logic Level UltraFET® Power MOSFET Packaging Features JEDEC TO-220AB JEDEC TO-263AB • Ultra Low On-Resistance DRAIN SOURCE (FLANGE) - rDS(ON) = 0.035Ω, VGS = 10V DRAIN GATE - rDS(ON) = 0.036Ω, VGS = 5V • Simulation Models GATE - Temperature Compensated PSPICE® and SABER™ SOURCE El

4.3. huf76645p3-s3s.pdf Size:218K _fairchild_semi

HUF76619D3S
HUF76619D3S

HUF76645P3, HUF76645S3S Data Sheet December 2001 75A, 100V, 0.015 Ohm, N-Channel, Logic Level UltraFET® Power MOSFET Packaging Features JEDEC TO-220AB JEDEC TO-263AB • Ultra Low On-Resistance DRAIN SOURCE - rDS(ON) = 0.014Ω, VGS = 10V DRAIN (FLANGE) GATE - rDS(ON) = 0.015Ω, VGS = 5V • Simulation Models GATE - Temperature Compensated PSPICE® and SABER™ SOURCE Elect

4.4. huf76639s3s.pdf Size:218K _fairchild_semi

HUF76619D3S
HUF76619D3S

HUF76639P3, HUF76639S3S Data Sheet December 2001 50A, 100V, 0.027 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging Features JEDEC TO-220AB JEDEC TO-263AB Ultra Low On-Resistance SOURCE DRAIN - rDS(ON) = 0.026?, VGS = 10V DRAIN (FLANGE) GATE - rDS(ON) = 0.027?, VGS = 5V Simulation Models GATE - Temperature Compensated PSPICE and SABER SOURCE Electrical Models

4.5. huf76633p3_f085.pdf Size:369K _fairchild_semi

HUF76619D3S
HUF76619D3S

HUF76633P3_F085 Data Sheet April 2012 38A, 100V, 0.036 Ohm, N-Channel, Logic Level UltraFET® Power MOSFET Packaging Features JEDEC TO-220AB • Ultra Low On-Resistance - rDS(ON) = 0.035Ω, VGS = 10V SOURCE DRAIN - rDS(ON) = 0.036Ω, VGS = 5V GATE • Simulation Models - Temperature Compensated PSPICE® and SABER™ Electrical Models - Spice and SABER Thermal Impedance Model

4.6. huf76629d3-s.pdf Size:203K _fairchild_semi

HUF76619D3S
HUF76619D3S

HUF76629D3, HUF76629D3S Data Sheet December 2001 20A, 100V, 0.054 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging JEDEC TO-251AA JEDEC TO-252AA Features Ultra Low On-Resistance DRAIN SOURCE (FLANGE) - rDS(ON) = 0.052?, VGS = 10V DRAIN - rDS(ON) = 0.054?, VGS = 5V GATE Simulation Models GATE - Temperature Compensated PSPICE and SABER SOURCE Electriecal Models

4.7. huf76639s_f085.pdf Size:244K _fairchild_semi

HUF76619D3S
HUF76619D3S

HUF76639S3ST_F085 July 2012 50A, 100V, 0.026 Ohm, N-Channel, Logic Level UltraFET® Power MOSFET Packaging Features JEDEC TO-263AB • Ultra Low On-Resistance DRAIN - rDS(ON) = 0.026Ω, VGS = 10V (FLANGE) • Simulation Models - Temperature Compensated PSPICE® and SABER™ GATE Electrical Models SOURCE - Spice and SABER Thermal Impedance Models - www.fairchildsemi.com •

4.8. huf76645s_f085.pdf Size:303K _fairchild_semi

HUF76619D3S
HUF76619D3S

HUFA76645S3ST_F085 Data Sheet September 2010 75A, 100V, 0.015 Ohm, N-Channel, Logic Level UltraFET® Power MOSFET Packaging Features • Ultra Low On-Resistance JEDEC TO-263AB - rDS(ON) = 0.014Ω, VGS = 10V - rDS(ON) = 0.015Ω, VGS = 5V DRAIN • Simulation Models (FLANGE) - Temperature Compensated PSPICE® and SABER™ Electrical Models GATE - Spice and SABER Thermal Imped

4.9. huf76639p3-s3s.pdf Size:223K _fairchild_semi

HUF76619D3S
HUF76619D3S

HUF76639P3, HUF76639S3S Data Sheet December 2001 50A, 100V, 0.027 Ohm, N-Channel, Logic Level UltraFET® Power MOSFET Packaging Features JEDEC TO-220AB JEDEC TO-263AB • Ultra Low On-Resistance SOURCE DRAIN - rDS(ON) = 0.026Ω, VGS = 10V DRAIN (FLANGE) GATE - rDS(ON) = 0.027Ω, VGS = 5V • Simulation Models GATE - Temperature Compensated PSPICE® and SABER™ SOURCE Ele

Datasheet: HUF76439S3S , HUF76443P3 , HUF76443S3S , HUF76445P3 , HUF76445S3S , HUF76609D3 , HUF76609D3S , HUF76619D3 , IRFB4227 , HUF76629D3 , HUF76629D3S , HUF76633P3 , HUF76633S3S , HUF76639P3 , HUF76639S3S , HUF76645P3 , HUF76645S3S .

 


HUF76619D3S
  HUF76619D3S
  HUF76619D3S
  HUF76619D3S
 
HUF76619D3S
  HUF76619D3S
  HUF76619D3S
  HUF76619D3S
 

social 

LIST

Last Update

MOSFET: 2SK2258-01 | 2SK2257-01 | 2SK2252-01S | 2SK2252-01L | 2SK2247 | 2SK2236 | 2SK2235 | 2SK2230 | 2SK2228 | 2SK2225-80-E | 2SK2224-01R | 2SK1928 | 2SK1927 | 2SK1915 | 2SK1913 |

Enter a full or partial SMD code with a minimum of 2 letters or numbers