STP3401A
MOSFET. Datasheet pdf. Equivalent
Type Designator: STP3401A
Type of Transistor: MOSFET
Type of Control Channel: P
-Channel
Pdⓘ
- Maximum Power Dissipation: 1.25
W
|Vds|ⓘ - Maximum Drain-Source Voltage: 30
V
|Vgs|ⓘ - Maximum Gate-Source Voltage: 12
V
|Vgs(th)|ⓘ - Maximum Gate-Threshold Voltage: 1
V
|Id|ⓘ - Maximum Drain Current: 4.3
A
Tjⓘ - Maximum Junction Temperature: 150
°C
Qgⓘ - Total Gate Charge: 6.8
nC
trⓘ - Rise Time: 16
nS
Cossⓘ -
Output Capacitance: 290
pF
Rdsⓘ - Maximum Drain-Source On-State Resistance: 0.056
Ohm
Package:
SOT-23
STP3401A
Transistor Equivalent Substitute - MOSFET Cross-Reference Search
STP3401A
Datasheet (PDF)
..1. Size:372K semtron
stp3401a.pdf
STP3401A -30V P-Channel Enhancement Mode MOSFETDESCRIPTIONFEATUREThe STP3401A is the P-Channel logic -30V/-4.3A, RDS(ON) =50m(typ.)@VGS =-10V enhancement mode power field effect transistor is -30V/-3.5A, RDS(ON) =58m(typ.)@VGS =-4.5V produced using high cell density. advanced trench -30V/-2.5A, RDS(ON) =73m(typ.)@VGS =-2.5V technology to provide exc
7.1. Size:372K semtron
stp3401.pdf
STP3401 -30V P-Channel Enhancement Mode MOSFETDESCRIPTIONFEATUREThe STP3401 is the P-Channel logic enhancement -30V/-4.3A, RDS(ON) =44m(typ.)@VGS =-10V mode power field effect transistor is produced using -30V/-3.5A, RDS(ON) =50m(typ.)@VGS =-4.5V high cell density. advanced trench technology to -30V/-2.5A, RDS(ON) =65m(typ.)@VGS =-2.5V provide exce
8.1. Size:364K semtron
stp3407.pdf
STP3407 -30V P-Channel Enhancement Mode MOSFETDESCRIPTION FEATUREThe STP3407 is the P-Channel logic enhancement -30V/-4.3A, RDS(ON) =38m(typ.)@VGS =-10V mode power field effect transistor is produced using -30V/-3.0A, RDS(ON) =58m(typ.)@VGS =-4.5V high cell density. advanced trench technology to provide excellent RDS(ON). Super high density cell desig
9.1. Size:510K st
stf34nm60n stp34nm60n stw34nm60n.pdf
STF34NM60NSTP34NM60N, STW34NM60NN-channel 600 V, 0.092 , 29 A MDmesh II Power MOSFETTO-220, TO-247, TO-220FPPreliminary dataFeaturesRDS(on) Type VDSS ID PTOTmax.3322STF34NM60N 600 V 0.105 29 A 40 W11STP34NM60N 600 V 0.105 29 A 210 WTO-247TO-220STW34NM60N 600 V 0.105 29 A 210 W 100% avalanche tested3 Low input capacitance and ga
9.2. Size:1424K st
stb34n65m5 sti34n65m5 stp34n65m5 stw34n65m5.pdf
STB34N65M5, STI34N65M5, STP34N65M5, STW34N65M5N-channel 650 V, 0.09 typ., 28 A MDmesh V Power MOSFETs in D2PAK, I2PAK, TO-220 and TO-247 packagesDatasheet - production dataFeatures TABTABOrder codes VDS @ TJmax RDS(on) max ID231321STB34N65M5D2PAKI2PAKSTI34N65M5710 V 0.11 28 ATABSTP34N65M5STW34N65M5 Worldwide best RDS(on) * area332
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stw34nm60nd stb34nm60nd stf34nm60nd stp34nm60nd.pdf
STB34NM60ND, STF34NM60ND, STP34NM60ND, STW34NM60NDN-channel 600 V, 0.097 typ., 29 A FDmesh II Power MOSFET (with fast diode) in D2PAK, TO-220FP, TO-220 and TO-247Datasheet production dataFeatures TABOrder codes VDS @TJ max. RDS(on) max. ID31STB34NM60ND321D2PAKSTF34NM60NDTO-220FP650 V 0.110 29 A STP34NM60NDTABSTW34NM60ND The worlds bes
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stb34n65m5 stf34n65m5 stfi34n65m5 stp34n65m5 stw34n65m5.pdf
STB34N65M5, STF34N65M5, STFI34N65M5,STI34N65M5, STP34N65M5, STW34N65M5N-channel 650 V, 0.09 typ., 28 A MDmesh V Power MOSFET in a D2PAK, TO-220FP, I2PAKFP, I2PAK, TO-220 and TO-247 packagesDatasheet - production dataFeaturesTABVDSS @ RDS(on) Order codes ID2TJmax max313STB34N65M52D2PAK1TO-220FPSTF34N65M5I2PAKFPSTFI34N65M5 TABTAB710 V
9.5. Size:1363K st
stb34nm60n stp34nm60n.pdf
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9.6. Size:383K stansontech
stp3481.pdf
STP3481 P Channel Enhancement Mode MOSFET -5.2A DESCRIPTION The STP3481 is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density , DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone and
9.7. Size:807K stansontech
stp3467.pdf
STP3467STP3467STP3467STP3467P Channel Enhancement Mode MOSFET-5.2ADESCRIPTIONDESCRIPTIONDESCRIPTIONDESCRIPTIONThe STP3467 is the P-Channel enhancement mode power field effect transistor which isproduced using high cell density, DMOS trench technology. This high density process isespecially tailored to minimize on-state resistance. These devices are particularlysuited f
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