STP4435
MOSFET. Datasheet pdf. Equivalent
Type Designator: STP4435
Type of Transistor: MOSFET
Type of Control Channel: P
-Channel
Pdⓘ
- Maximum Power Dissipation: 3.2
W
|Vds|ⓘ - Maximum Drain-Source Voltage: 30
V
|Vgs|ⓘ - Maximum Gate-Source Voltage: 20
V
|Vgs(th)|ⓘ - Maximum Gate-Threshold Voltage: 2.5
V
|Id|ⓘ - Maximum Drain Current: 10
A
Tjⓘ - Maximum Junction Temperature: 150
°C
Qgⓘ - Total Gate Charge: 22
nC
trⓘ - Rise Time: 9.7
nS
Cossⓘ -
Output Capacitance: 305
pF
Rdsⓘ - Maximum Drain-Source On-State Resistance: 0.02
Ohm
Package:
SOP-8
STP4435
Transistor Equivalent Substitute - MOSFET Cross-Reference Search
STP4435
Datasheet (PDF)
..1. Size:381K semtron
stp4435.pdf 
STP4435 -30V P-Channel Enhancement Mode MOSFETDESCRIPTIONFEATUREThe STP4435 is the P-Channel logic enhancement -30V/-10.0A, RDS(ON) =15m(typ)@VGS =-10V mode power field effect transistor is produced using -30V/-6.0A, RDS(ON) =25m(typ)@VGS =-4.5V high cell density. advanced trench technology to provide excellent RDS(ON). Super high density cell design
..2. Size:592K stansontech
stp4435.pdf
STP4435 P Channel Enhancement Mode MOSFET -10A DESCRIPTION STP4435 is the P-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as LCD backlight, notebo
0.1. Size:549K stansontech
stp4435a.pdf
STP4435A P Channel Enhancement Mode MOSFET -10A DESCRIPTION STP4435A is the P-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as LCD backlight, note
9.1. Size:258K samhop
stb440s stp440s.pdf
GreenProductSTB/P440SaS mHop Microelectronics C orp.Ver 1.0N-Channel Logic Level Enhancement Mode Field Effect TransistorFEATURESPRODUCT SUMMARYSuper high dense cell design for extremely low RDS(ON).RDS(ON) (m) MaxVDSS IDHigh power and current handling capability.8 @ VGS=10VTO-220 & TO-263 package.40V 65A11.5 @ VGS=4.5VS TB S E R IE S S TP S E R IE STO-263
9.2. Size:189K samhop
stb4410 stp4410.pdf
STB4410GreenProductSTP4410aS mHop Microelectronics C orp.Ver 1.0N-Channel Logic Level Enhancement Mode Field Effect TransistorFEATURESPRODUCT SUMMARYSuper high dense cell design for extremely low RDS(ON).VDSS ID RDS(ON) (m) TypHigh power and current handling capability.100V 75A 7.0 @ VGS=10VTO-220 & TO-263 package.DGSTB SERIESSTP SERIESTO-263(DD-PAK)TO-
9.3. Size:821K stansontech
stp4407a.pdf
STP4407A P Channel Enhancement Mode MOSFET - 10A DESCRIPTION The STP4407A is the P-Channel logic enhancement mode power field effect transistor is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone an
9.4. Size:579K stansontech
stp4407.pdf
STP4407 P Channel Enhancement Mode MOSFET - 10A DESCRIPTION The STP4407 is the P-Channel logic enhancement mode power field effect transistor is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone and no
9.5. Size:637K stansontech
stp4441.pdf
STP4441 P Channel Enhancement Mode MOSFET -10A SCRIPTION STP4441 is the P-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application, noteook power management ane t
9.6. Size:253K stansontech
stp4403.pdf
STP4403 P Channel Enhancement Mode MOSFET - 10.0A DESCRIPTION STP4403 is the P-Channel logic enhancement mode power field effect transistors are produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application, such as cellular phone and n
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