HUF75617D3S
MOSFET. Datasheet pdf. Equivalent
Type Designator: HUF75617D3S
Marking Code: 75617D
Type of Transistor: MOSFET
Type of Control Channel: N
-Channel
Pdⓘ
- Maximum Power Dissipation: 64
W
|Vds|ⓘ - Maximum Drain-Source Voltage: 100
V
|Vgs|ⓘ - Maximum Gate-Source Voltage: 20
V
|Vgs(th)|ⓘ - Maximum Gate-Threshold Voltage: 4
V
|Id|ⓘ - Maximum Drain Current: 16
A
Tjⓘ - Maximum Junction Temperature: 175
°C
Qgⓘ - Total Gate Charge: 31
nC
trⓘ - Rise Time: 35
nS
Cossⓘ -
Output Capacitance: 125
pF
Rdsⓘ - Maximum Drain-Source On-State Resistance: 0.09
Ohm
Package:
TO-252AA
HUF75617D3S
Transistor Equivalent Substitute - MOSFET Cross-Reference Search
HUF75617D3S
Datasheet (PDF)
..1. Size:196K fairchild semi
huf75617d3st huf75617d3 huf75617d3s.pdf
HUF75617D3, HUF75617D3SData Sheet December 200116A, 100V, 0.090 Ohm, N-Channel, UltraFET Power MOSFETsPackagingJEDEC TO-251AA JEDEC TO-252AAFeatures Ultra Low On-ResistanceSOURCEDRAINDRAIN- rDS(ON) = 0.090, VGS = 10V (FLANGE)GATE Simulation ModelsGATE- Temperature Compensated PSPICE and SABER SOURCEElectrical ModelsDRAIN (FLANGE) - Spice
8.1. Size:198K fairchild semi
huf75623s3st.pdf
HUF75623P3, HUF75623S3STData Sheet December 200122A, 100V, 0.064 Ohm, N-Channel, UltraFET Power MOSFETsPackagingJEDEC TO-220AB JEDEC TO-263ABFeaturesSOURCEDRAINDRAIN Ultra Low On-Resistance (FLANGE)GATE- rDS(ON) = 0.064, VGS = 10V Simulation ModelsGATE- Temperature Compensated PSPICE and SABER SOURCEElectrical ModelsDRAIN- Spice and SABER T
8.2. Size:227K fairchild semi
huf75639s3st.pdf
HUF75639G3, HUF75639P3, HUF75639S3S,HUF75639S3Data Sheet December 200156A, 100V, 0.025 Ohm, N-Channel FeaturesUltraFET Power MOSFETs 56A, 100VThese N-Channel power MOSFETs Simulation Modelsare manufactured using the - Temperature Compensated PSPICE and SABER innovative UltraFET process. This Electrical Modelsadvanced process technology - Spice and Saber T
8.3. Size:254K fairchild semi
huf75631sk8.pdf
HUF75631SK8Data Sheet December 20015.5A, 100V, 0.039 Ohm, N-Channel, UltraFET Power MOSFETPackagingJEDEC MS-012AAFeaturesBRANDING DASH Ultra Low On-Resistance- rDS(ON) = 0.039, VGS = 10V5 Simulation Models1 - Temperature Compensated PSPICE and SABER 2Electrical Models34- Spice and SABER Thermal Impedance Models- www.fairchildsemi.comSymbol
8.4. Size:230K fairchild semi
huf75639s f085a.pdf
HUFA75639S3ST_F085AData Sheet March 201256A, 100V, 0.025 Ohm, N-Channel FeaturesUltraFET Power MOSFETs 56A, 100VThese N-Channel power MOSFETs Peak Current vs Pulse Width Curveare manufactured using the UIS Rating Curveinnovative UltraFET process. This advanced process technology Related Literature achieves the lowest possible on-resistance per silicon ar
8.5. Size:203K fairchild semi
huf75645s3st.pdf
HUF75645P3, HUF75645S3SData Sheet December 200175A, 100V, 0.014 Ohm, N-Channel, UltraFET Power MOSFETsPackagingJEDEC TO-220AB JEDEC TO-263ABFeaturesSOURCE DRAINDRAIN Ultra Low On-Resistance (FLANGE)GATE- rDS(ON) = 0.014, VGS = 10VGATE Simulation Models- Temperature Compensated PSPICE and SABER SOURCEElectrical ModelsDRAIN- Spice and Saber Th
8.6. Size:195K fairchild semi
huf75652g3.pdf
HUF75652G3Data Sheet December 200175A, 100V, 0.008 Ohm, N-Channel UltraFET Power MOSFETPackagingJEDEC TO-247FeaturesSOURCEDRAIN Ultra Low On-ResistanceGATE- rDS(ON) = 0.008, VGS = 10V Simulation Models- Temperature Compensated PSPICE and SABER Electrical Models- Spice and SABER Thermal Impedance Models- www.fairchildsemi.comDRAINHUF75652G3(T
8.7. Size:202K fairchild semi
huf75631s3s.pdf
HUF75631P3, HUF75631S3STData Sheet December 200133A, 100V, 0.040 Ohm, N-Channel, UltraFET Power MOSFETsPackagingJEDEC TO-220AB JEDEC TO-263ABFeaturesSOURCE DRAINDRAIN (FLANGE) Ultra Low On-ResistanceGATE- rDS(ON) = 0.040, VGS = 10VGATE Simulation ModelsSOURCE- Temperature Compensated PSPICE and SABER Electrical ModelsDRAIN (FLANGE)- Spice an
8.8. Size:249K fairchild semi
huf75631sk8t.pdf
HUF75631SK8Data Sheet December 20015.5A, 100V, 0.039 Ohm, N-Channel, UltraFET Power MOSFETPackagingJEDEC MS-012AAFeaturesBRANDING DASH Ultra Low On-Resistance- rDS(ON) = 0.039, VGS = 10V5 Simulation Models1 - Temperature Compensated PSPICE and SABER 2Electrical Models34- Spice and SABER Thermal Impedance Models- www.fairchildsemi.comSymbol
8.9. Size:200K fairchild semi
huf75637s3 huf75637s3st.pdf
HUF75637P3, HUF75637S3SData Sheet December 200144A, 100V, 0.030 Ohm, N-Channel, UltraFET Power MOSFETPackagingJEDEC TO-220AB JEDEC TO-263ABFeaturesSOURCE DRAINDRAIN (FLANGE) Ultra Low On-ResistanceGATE- rDS(ON) = 0.030, VGS = 10VGATE Simulation ModelsSOURCE - Temperature Compensated PSPICE and SABER Electrical ModelsDRAIN (FLANGE) - Spice and S
8.10. Size:201K fairchild semi
huf75637.pdf
HUF75637P3, HUF75637S3SData Sheet December 200144A, 100V, 0.030 Ohm, N-Channel, UltraFET Power MOSFETPackagingJEDEC TO-220AB JEDEC TO-263ABFeaturesSOURCE DRAINDRAIN (FLANGE) Ultra Low On-ResistanceGATE- rDS(ON) = 0.030, VGS = 10VGATE Simulation ModelsSOURCE - Temperature Compensated PSPICE and SABER Electrical ModelsDRAIN (FLANGE) - Spice and S
8.11. Size:229K fairchild semi
huf75639g3 huf75639p3 huf75639s3s huf75639s3.pdf
HUF75639G3, HUF75639P3, HUF75639S3S,HUF75639S3Data Sheet December 200156A, 100V, 0.025 Ohm, N-Channel FeaturesUltraFET Power MOSFETs 56A, 100VThese N-Channel power MOSFETs Simulation Modelsare manufactured using the - Temperature Compensated PSPICE and SABER innovative UltraFET process. This Electrical Modelsadvanced process technology - Spice and Saber T
8.12. Size:204K fairchild semi
huf75645p3 huf75645s3s.pdf
HUF75645P3, HUF75645S3SData Sheet December 200175A, 100V, 0.014 Ohm, N-Channel, UltraFET Power MOSFETsPackagingJEDEC TO-220AB JEDEC TO-263ABFeaturesSOURCE DRAINDRAIN Ultra Low On-Resistance (FLANGE)GATE- rDS(ON) = 0.014, VGS = 10VGATE Simulation Models- Temperature Compensated PSPICE and SABER SOURCEElectrical ModelsDRAIN- Spice and Saber Th
8.13. Size:200K fairchild semi
huf75631s3st.pdf
HUF75631P3, HUF75631S3STData Sheet December 200133A, 100V, 0.040 Ohm, N-Channel, UltraFET Power MOSFETsPackagingJEDEC TO-220AB JEDEC TO-263ABFeaturesSOURCE DRAINDRAIN (FLANGE) Ultra Low On-ResistanceGATE- rDS(ON) = 0.040, VGS = 10VGATE Simulation ModelsSOURCE- Temperature Compensated PSPICE and SABER Electrical ModelsDRAIN (FLANGE)- Spice an
8.14. Size:537K onsemi
huf75652g3.pdf
MOSFET Power, N-Channel,Ultrafet100 V, 75 A, 8 mWHUF75652G3Featureswww.onsemi.com Ultra Low On-Resistance rDS(ON) = 0.008 W, VGS = 10 V Simulation ModelsD Temperature Compensated PSPICE and SABER ElectricalModels Spice and SABER Thermal Impedance ModelsG www.onsemi.com Peak Current vs Pulse Width CurveS UIS Rating Curve Th
8.15. Size:720K onsemi
huf75639g3 huf75639p3 huf75639s3s huf75639s3.pdf
MOSFET Power, N-Channel,Ultrafet100 V, 56 A, 25 mWHUF75639G3, HUF75639P3,HUF75639S3S, HUF75639S3www.onsemi.comThese N-Channel power MOSFETs are manufactured using theinnovative Ultrafet process. This advanced process technologyachieves the lowest possible on- resistance per silicon area, resultingin outstanding performance. This device is capable of withstandinghigh ener
8.16. Size:391K onsemi
huf75645p3 huf75645s3s.pdf
HUF75645P3, HUF75645S3SData Sheet October 2013N-Channel UltraFET Power MOSFET100 V, 75 A, 14 mFeaturesPackaging Ultra Low On-Resistance- rDS(ON) = 0.014, VGS = 10VJEDEC TO-220AB JEDEC TO-263AB Simulation ModelsSOURCE DRAIN- Temperature Compensated PSPICE and SABERDRAIN (FLANGE)GATEElectrical Models- Spice and Saber Thermal Impedance ModelsGATE
8.17. Size:98K intersil
huf75623p3.pdf
HUF75623P3Data Sheet November 1999 File Number 480422A, 100V, 0.064 Ohm, N-Channel,UltraFET Power MOSFETPackagingFeaturesJEDEC TO-220AB Ultra Low On-Resistance- rDS(ON) = 0.064, VGS = 10VSOURCEDRAIN Simulation ModelsGATE- Temperature Compensated PSPICE and SABERElectrical Models- Spice and SABER Thermal Impedance Models- www.intersil.comDRAIN (
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