All MOSFET. 2N7002DW Datasheet

 

2N7002DW Datasheet and Replacement


   Type Designator: 2N7002DW
   Marking Code: K72
   Type of Transistor: MOSFET
   Type of Control Channel: N -Channel
   Pdⓘ - Maximum Power Dissipation: 0.2 W
   |Vds|ⓘ - Maximum Drain-Source Voltage: 60 V
   |Vgs|ⓘ - Maximum Gate-Source Voltage: 20 V
   |Vgs(th)|ⓘ - Maximum Gate-Threshold Voltage: 2 V
   |Id|ⓘ - Maximum Drain Current: 0.115 A
   Tjⓘ - Maximum Junction Temperature: 150 °C
   Qgⓘ - Total Gate Charge: 0.6 nC
   Rdsⓘ - Maximum Drain-Source On-State Resistance: 7.5 Ohm
   Package: SC70
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2N7002DW Datasheet (PDF)

 ..1. Size:257K  fairchild semi
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2N7002DW

October 20072N7002DWN-Channel Enhancement Mode Field Effect TransistorFeatures Dual N-Channel MOSFET Low On-Resistance Low Gate Threshold Voltage Low Input Capacitance Fast Switching Speed Low Input/Output Leakage Ultra-Small Surface Mount Package Lead Free/RoHS CompliantSC70-6 (SOT363)11Marking : 2NAbsolute Maximum Ratings * Ta = 25C un

 ..2. Size:84K  diodes
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2N7002DW

2N7002DWDUAL N-CHANNEL ENHANCEMENT MODE FIELD EFFECT TRANSISTOR Features Mechanical Data Dual N-Channel MOSFET Case: SOT-363 Low On-Resistance Case Material: Molded Plastic. Green Molding Compound. UL Flammability Classification Rating 94V-0 Low Gate Threshold Voltage Moisture Sensitivity: Level 1 per J-STD-020 Low Input Capacitance Termina

 ..3. Size:443K  infineon
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2N7002DW

2N7002DWOptiMOS Small-Signal-TransistorProduct Summary FeaturesVDS 60 V Dual N-channelRDS(on),max VGS=10 V 3 W Enhancement mode Logic level VGS=4.5 V 4 Avalanche ratedID 0.3 A Fast switching Qualified according to AEC Q101PG-SOT363 100% lead-free; RoHS compliant6 5 4 Halogen-free according to IEC61249-2-211 2 3 Type

 ..4. Size:909K  mcc
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2N7002DW

MCCMicro Commercial ComponentsTM2N7002DW20736 Marilla Street ChatsworthMicro Commercial ComponentsCA 91311Phone: (818) 701-4933Fax: (818) 701-4939FeaturesHalogen free available upon request by adding suffix "-HF" Epoxy meets UL 94 V-0 flammability rating Moisture Sensitivity Level 1N-Channel MOSFET High density cell design for low RDS(ON) Rugged and r

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