ST2341SRG
MOSFET. Datasheet pdf. Equivalent
Type Designator: ST2341SRG
Marking Code: 21*
Type of Transistor: MOSFET
Type of Control Channel: P
-Channel
Pdⓘ
- Maximum Power Dissipation: 1.25
W
|Vds|ⓘ - Maximum Drain-Source Voltage: 20
V
|Vgs|ⓘ - Maximum Gate-Source Voltage: 12
V
|Vgs(th)|ⓘ - Maximum Gate-Threshold Voltage: 1
V
|Id|ⓘ - Maximum Drain Current: 3.2
A
Tjⓘ - Maximum Junction Temperature: 150
°C
Qgⓘ - Total Gate Charge: 5.8
nC
trⓘ - Rise Time: 36
nS
Cossⓘ -
Output Capacitance: 223
pF
Rdsⓘ - Maximum Drain-Source On-State Resistance: 0.05
Ohm
Package:
SOT23
ST2341SRG
Transistor Equivalent Substitute - MOSFET Cross-Reference Search
ST2341SRG
Datasheet (PDF)
..1. Size:598K stansontech
st2341srg.pdf
ST2341SRG P Channel Enhancement Mode MOSFET -3.2A DESCRIPTION ST2341SRG is the P-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology.This high density process is especially tailored to minimize on-state resistance.These devices are particularly suited for low voltage application such as cellular phone and
7.1. Size:602K stansontech
st2341s23rg.pdf
ST2341S23RG P Channel Enhancement Mode MOSFET -5.3A DESCRIPTION ST2341S23RG is the P-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular pho
7.2. Size:906K cn vbsemi
st2341s23r.pdf
ST2341S23Rwww.VBsemi.twP-Channel 30 V (D-S) MOSFETFEATURESPRODUCT SUMMARY TrenchFET Power MOSFET 100 % Rg TestedVDS (V) RDS(on) () Typ.ID (A)a Qg (Typ.)0.046 at VGS = - 10 V - 5.60.049 at VGS = - 6 V - 5 11.4 nC- 30APPLICATIONS0.054 at VGS = - 4.5 V -4.5 For Mobile Computing- Load Switch- Notebook Adaptor SwitchSTO-236- DC/DC Converter(SOT-
8.1. Size:576K stansontech
st2341a.pdf
ST2341A P Channel Enhancement Mode MOSFET -6.0A DESCRIPTION ST2341A is the P-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone and n
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