October 1997 FDC6302P Digital FET, Dual P-Channel General Description FeaturesThese Dual P-Channel logic level enhancement mode field effect -25 V, -0.12 A continuous, -0.5 A Peak.transistors are produced using Fairchild's proprietary, high cell RDS(ON) = 13 @ VGS= -2.7 Vdensity, DMOS technology. This very high density process is RDS(ON) = 10 @ VGS = -4.5 V.especially

March 1999FDC6305NDual N-Channel 2.5V Specified PowerTrenchTM MOSFETGeneral Description Features 2.7 A, 20 V. RDS(ON) = 0.08 @ VGS = 4.5 VThese N-Channel low threshold 2.5V specifiedMOSFETs are produced using Fairchild Semiconductor'sRDS(ON) = 0.12 @ VGS = 2.5 Vadvanced PowerTrench process that has beenespecially tailored to minimize on-state resistance and Low

February 1999FDC6306PDual P-Channel 2.5V Specified PowerTrench MOSFETFeaturesGeneral DescriptionThese P-Channel 2.5V specified MOSFETs are produced -1.9 A, -20 V. RDS(on) = 0.170 @ VGS = -4.5 Vusing Fairchild Semiconductor's advanced PowerTrenchRDS(on) = 0.250 @ VGS = -2.5 Vprocess that has been especially tailored to minimizeon-state resistance and yet maintain

July 1997 FDC6304P Digital FET, Dual P-Channel General Description Features-25 V, -0.46 A continuous, -1.0 A Peak.These P-Channel enhancement mode field effect transistor areproduced using Fairchild's proprietary, high cell density, DMOS RDS(ON) = 1.5 @ VGS= -2.7 Vtechnology. This very high density process is tailored to minimizeRDS(ON) = 1.1 @ VGS = -4.5 V.on-state

September 2001 FDC6301N Dual N-Channel , Digital FETGeneral Description Features25 V, 0.22 A continuous, 0.5 A Peak.These dual N-Channel logic level enhancement mode fieldeffect transistors are produced using Fairchild 's proprietary, RDS(ON) = 5 @ VGS= 2.7 Vhigh cell density, DMOS technology. This very high densityRDS(ON) = 4 @ VGS= 4.5 V.process is especially tailo

July 1999FDC6308PDual P-Channel 2.5V Specified PowerTrenchTM MOSFETGeneral Description FeaturesThis P-Channel 2.5V specified MOSFET is a rugged -1.7 A, -18 V. RDS(ON) = 0.18 @ VGS = -4.5 Vgate version of Fairchild Semiconductor's advancedRDS(ON) = 0.30 @ VGS = -2.5 VPowerTrench process. It has been optimized for powermanagement applications with a wide range of gate

August 1997 FDC6303N Digital FET, Dual N-ChannelGeneral Description Features25 V, 0.68 A continuous, 2 A Peak.These dual N-Channel logic level enhancement mode fieldRDS(ON) = 0.6 @ VGS = 2.7 Veffect transistors are produced using Fairchild's proprietary,high cell density, DMOS technology. This very high density RDS(ON) = 0.45 @ VGS= 4.5 V.process is especially tailored

Is Now Part ofTo learn more about ON Semiconductor, please visit our website at www.onsemi.comPlease note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductors system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclatur

Is Now Part ofTo learn more about ON Semiconductor, please visit our website at www.onsemi.comPlease note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductors system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclatur

FDC6301N Dual N-Channel , Digital FET FeaturesGeneral Description25 V, 0.22 A continuous, 0.5 A Peak.These dual N-Channel logic level enhancement mode field RDS(ON) = 5 @ VGS= 2.7 Veffect transistors are produced using ON Semiconductor 's RDS(ON) = 4 @ VGS= 4.5 V.proprietary, high cell density, DMOS technology. This very high density process is especially tailored to

FDC6305Nwww.VBsemi.twDual N-Channel 20 V (D-S) MOSFETFEATURESPRODUCT SUMMARY Halogen-free According to IEC 61249-2-21VDS (V) RDS(on) ()ID (A)a Qg (Typ.)Definition0.022 at VGS = 4.5 V TrenchFET Power MOSFET6.020 1.8 nC 100 % Rg Tested0.028 at VGS = 2.5 V 5.0 Compliant to RoHS Directive 2002/95/ECTSOP-6 D1 D 2 D Top View G1 D1 1 6 G 1