PSMN1R8-30MLH Todos los transistores

PSMN1R8-30MLH N-channel 30 V, 2.1 m , 150 A logic level MOSFET in LFPAK33 using NextPowerS3 technology 30 September 2019 Product data sheet 1. General description Logic level gate drive N-channel enhancement mode MOSFET in LFPAK33 package. NextPowerS3 technology delivers low RDSon, low IDSS leakage and high efficiency. Rated to 150 A and optimizedwith low gate resistance (RG) for fast-s

PSMN1R8-30PL N-channel 30 V, 1.8 m logic level MOSFET in TO-220 Rev. 02 2 November 2010 Product data sheet 1. Product profile 1.1 General description Logic level N-channel MOSFET in TO-220 package qualified to 175 C. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment. 1.2 Features and benefits High efficiency

PSMN1R8-30PL N-channel 30 V, 1.8 m logic level MOSFET in TO-220 Rev. 02 2 November 2010 Product data sheet 1. Product profile 1.1 General description Logic level N-channel MOSFET in TO-220 package qualified to 175 C. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment. 1.2 Features and benefits High efficiency

PSMN1R8-30BL N-channel 30 V, 1.8 m logic level MOSFET in D2PAK Rev. 1 22 March 2012 Product data sheet 1. Product profile 1.1 General description Logic level N-channel MOSFET in D2PAK package qualified to 175 C. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment. 1.2 Features and benefits High efficiency du

isc N-Channel MOSFET Transistor PSMN1R8-30PL FEATURES Drain Current I = 100A@ T =25 D C Drain Source Voltage- V = 30V(Min) DSS Static Drain-Source On-Resistance R = 1.8m (Max) DS(on) 100% avalanche tested Minimum Lot-to-Lot variations for robust device performance and reliable operation DESCRIPTION Designed for use in switch mode power supplies and general

isc N-Channel MOSFET Transistor PSMN1R8-30BL FEATURES Drain Current I = 100A@ T =25 D C Drain Source Voltage- V = 30V(Min) DSS Static Drain-Source On-Resistance R = 1.8m (Max) DS(on) 100% avalanche tested Minimum Lot-to-Lot variations for robust device performance and reliable operation DESCRIPTION Designed for use in switch mode power supplies and general