FIR10N10LG Todos los transistores

 ..1. Size:1918K  first semi
 fir10n10lg.pdf

FIR10N10LG 100V N-Channel MOSFET-SE TO-252 Features 2 Low Intrinsic Capacitances. Excellent Switching Characteristics. Extended Safe Operating Area. Unrivalled Gate Charge Qg= 14nC (Typ.). 1 BVDSS=100V,ID=10A 3 RDS(on) 0.21 (Max) @VG=10V 100% Avalanche Tested 1. Gate (G) 2. Drain (D) 3. Source (S) Absolute Maximum Ratings (TA=25 un

 8.1. Size:4610K  first semi
 fir10n50fg.pdf

FIR10N50FG N - CHANNEL MOSFET-G PIN Connection TO-220F VDSS 500 V ID 10 A PD(TC=25 ) 40 W RDS(ON)Typ 0.5 General Description G D S , the silicon N-channel Enhanced FIR10N50FG VDMOSFETs, is obtained by the self-aligned planar Technology D which reduce the conduction loss, improve switching performance and enhance the avalanche energy. The transistor G can be

 8.2. Size:2398K  first semi
 fir10n70fg.pdf

FIR10N70FG 700V N-Channel MOSFET-G PIN Connection TO-220F Features Low Intrinsic Capacitances. Excellent Switching Characteristics. Extended Safe Operating Area. Unrivalled Gate Charge Qg= 37nC (Typ.). BVDSS=700V,ID=10A G DS RDS(on) 1.0 (Max) @VG=10V 100% Avalanche Tested g Schematic dia ram D G S Marking Diagram Y = Year A = Assembly Locati

 8.3. Size:4827K  first semi
 fir10n80fg.pdf

FIR10N80FG N-Channel Power MOSFET PIN Connection TO-220F VDSS 800 V ID 9 A PD(TC=25 ) 190 W RDS(ON) 1.2 G D S Features g Schematic dia ram D Fast Switching Low ON Resistance(Rdson 1.20 ) G Low Gate Charge (Typical Data 48nC) Low Reverse transfer capacitances(Typical 17pF) S 100% Single Pulse avalanche energy Test Marking Diagram Applications Y

 8.4. Size:2148K  first semi
 fir10n20lg.pdf

FIR10N20LG 200V N-Channel MOSFET-C TO-252 2 Features Low Intrinsic Capacitances Excellent Switching Characteristics 1 Extended Safe Operating Area Unrivalled Gate Charge 22 nC (Typ.) 3 BVDSS=200V,ID=10A Lower RDS(on) 0.4 (Max) @VG=10V 100% Avalanche Tested 1.Gate (G) 2.Drain (D) 3.Source (S) Absolute Maximum Ratings (Ta=25 unless otherw

 8.5. Size:1909K  first semi
 fir10n65fg.pdf

FIR10N65FG Advanced N-Ch Power MOSFET PIN Connection TO-220F Switchng Regulator Application Features High Voltage BVDSS=650V(Min.) Low Crss Crss=16pF(Typ.) G Low gate charge Qg=35nC(Typ.) D S Low RDS(on) RDS(on)=0.8 D G S Marking Diagram Y = Year A = Assembly Location YAWW WW = Work Week FIR10N65F FIR10N65F = Specific Device Code Absolu

 8.6. Size:2678K  first semi
 fir10n60fg.pdf

FIR10N60FG Silicon N-Channel Power MOSFET PIN Connection TO-220F VDSS 600 V ID 10 A PD (TC=25 ) 125 W RDS(ON) 0.63 Features G D S Fast Switching ESD Improved Capability D Low Gate Charge (Typical Data 60nC) Low Reverse transfer capacitances(Typical 28pF) G 100% Single Pulse avalanche energy Test S Applications Marking Diagram Power switch circuit of adap