D8N50 Todos los transistores

 ..1. Size:1218K  cn wxdh
 d8n50.pdf

D8N50 8A 500V N-channel Enhancement Mode Power MOSFET 1 Description These N-channel enhanced vdmosfets, is obtained by the self-aligned V DSS = 500V planar technology which reduce the conduction loss, improve switching I = 8.0A D performance and enhance the avalanche energy. Which accords with the RoHS standard. R DS(on) TYP) =0.72 2 Features Fast switching ESD impro

 0.1. Size:638K  fairchild semi
 fdd8n50nz.pdf

August 2010 UniFET-IITM FDD8N50NZ N-Channel MOSFET 500V, 6.5A, 0.85 Features Description RDS(on) = 0.77 ( Typ.) @ VGS = 10V, ID = 3.25A This N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS Low Gate Charge ( Typ. 14nC) technology. Low Crss ( Typ. 5pF) This advance technology has been especiall

 0.2. Size:714K  onsemi
 fdd8n50nz.pdf

Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com Please note As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclatur

 0.3. Size:5144K  maple semi
 sld8n50ud.pdf

 0.4. Size:452K  trinnotech
 tmd8n50z tmu8n50z.pdf

TMD8N50Z(G)/TMU8N50Z(G) N-channel MOSFET Features Low gate charge BVDSS ID RDS(on) 100% avalanche tested 500V 8A

 0.5. Size:223K  inchange semiconductor
 fdd8n50nz.pdf

Isc N-Channel MOSFET Transistor FDD8N50NZ FEATURES With To-252(DPAK) package Low input capacitance and gate charge Low gate input resistance 100% avalanche tested Minimum Lot-to-Lot variations for robust device performance and reliable operation APPLICATIONS Switching applications ABSOLUTE MAXIMUM RATINGS(T =25 ) a SYMBOL PARAMETER VALUE UNIT V Drain-Source Volt