C651 Todos los transistores

 0.1. Size:71K  fairchild semi
 ndc651n.pdf

March 1996 NDC651N N-Channel Logic Level Enhancement Mode Field Effect Transistor General Description Features These N-Channel logic level enhancement mode power field 3.2A, 30V. RDS(ON) = 0.09 @ VGS = 4.5V effect transistors are produced using Fairchild's proprietary, RDS(ON) = 0.06 @ VGS = 10V. high cell density, DMOS technology. This very high density process is tailored t

 0.2. Size:427K  kec
 krc651u-krc656u.pdf

SEMICONDUCTOR KRC651U KRC656U TECHNICAL DATA EPITAXIAL PLANAR NPN TRANSISTOR SWITCHING APPLICATION. INTERFACE CIRCUIT AND DRIVER CIRCUIT APPLICATION. B FEATURES B1 With Built-in Bias Resistors. 1 5 DIM MILLIMETERS _ Simplify Circuit Design. A 2.00 + 0.20 2 _ A1 1.3 + 0.1 Reduce a Quantity of Parts and Manufacturing Process. _ B 2.1 + 0.1 3 4 D _ B1 1.25 + 0.1 High Pa

 0.3. Size:394K  kec
 krc651f-krc654f.pdf

SEMICONDUCTOR KRC651F KRC654F TECHNICAL DATA EPITAXIAL PLANAR NPN TRANSISTOR SWITCHING APPLICATION. INTERFACE CIRCUIT AND DRIVER CIRCUIT APPLICATION. B FEATURES B1 With Built-in Bias Resistors. Simplify Circuit Design. Reduce a Quantity of Parts and Manufacturing Process. DIM MILLIMETERS High Packing Density. _ + A 1.0 0.05 _ + A1 0.7 0.05 Thin Fine Pitch Super mi

 0.4. Size:70K  kec
 krc651e-krc656e.pdf

SEMICONDUCTOR KRC651E KRC656E TECHNICAL DATA EPITAXIAL PLANAR NPN TRANSISTOR SWITCHING APPLICATION. INTERFACE CIRCUIT AND DRIVER CIRCUIT APPLICATION. B B1 FEATURES With Built-in Bias Resistors. Simplify Circuit Design. 1 5 DIM MILLIMETERS _ A 1.6 0.05 + Reduce a Quantity of Parts and Manufacturing Process. _ + A1 1.0 0.05 2 _ + B 1.6 0.05 High Packing Density. _