All MOSFET. FDC6304P Datasheet

 

FDC6304P Datasheet and Replacement


   Type Designator: FDC6304P
   Marking Code: .304
   Type of Transistor: MOSFET
   Type of Control Channel: P -Channel
   Pd ⓘ - Maximum Power Dissipation: 0.9 W
   |Vds|ⓘ - Maximum Drain-Source Voltage: 25 V
   |Vgs|ⓘ - Maximum Gate-Source Voltage: 8 V
   |Vgs(th)|ⓘ - Maximum Gate-Threshold Voltage: 1.5 V
   |Id| ⓘ - Maximum Drain Current: 0.46 A
   Tj ⓘ - Maximum Junction Temperature: 150 °C
   Qg ⓘ - Total Gate Charge: 1.1 nC
   tr ⓘ - Rise Time: 8 nS
   Cossⓘ - Output Capacitance: 35 pF
   Rds ⓘ - Maximum Drain-Source On-State Resistance: 1.1 Ohm
   Package: SUPERSOT6
 

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FDC6304P Datasheet (PDF)

 ..1. Size:80K  fairchild semi
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FDC6304P

July 1997 FDC6304P Digital FET, Dual P-Channel General Description Features-25 V, -0.46 A continuous, -1.0 A Peak.These P-Channel enhancement mode field effect transistor areproduced using Fairchild's proprietary, high cell density, DMOS RDS(ON) = 1.5 @ VGS= -2.7 Vtechnology. This very high density process is tailored to minimizeRDS(ON) = 1.1 @ VGS = -4.5 V.on-state

 8.1. Size:73K  fairchild semi
fdc6305n.pdf pdf_icon

FDC6304P

March 1999FDC6305NDual N-Channel 2.5V Specified PowerTrenchTM MOSFETGeneral Description Features 2.7 A, 20 V. RDS(ON) = 0.08 @ VGS = 4.5 VThese N-Channel low threshold 2.5V specifiedMOSFETs are produced using Fairchild Semiconductor'sRDS(ON) = 0.12 @ VGS = 2.5 Vadvanced PowerTrench process that has beenespecially tailored to minimize on-state resistance and Low

 8.2. Size:61K  fairchild semi
fdc6306p.pdf pdf_icon

FDC6304P

February 1999FDC6306PDual P-Channel 2.5V Specified PowerTrench MOSFETFeaturesGeneral DescriptionThese P-Channel 2.5V specified MOSFETs are produced -1.9 A, -20 V. RDS(on) = 0.170 @ VGS = -4.5 Vusing Fairchild Semiconductor's advanced PowerTrenchRDS(on) = 0.250 @ VGS = -2.5 Vprocess that has been especially tailored to minimizeon-state resistance and yet maintain

 8.3. Size:82K  fairchild semi
fdc6302p.pdf pdf_icon

FDC6304P

October 1997 FDC6302P Digital FET, Dual P-Channel General Description FeaturesThese Dual P-Channel logic level enhancement mode field effect -25 V, -0.12 A continuous, -0.5 A Peak.transistors are produced using Fairchild's proprietary, high cell RDS(ON) = 13 @ VGS= -2.7 Vdensity, DMOS technology. This very high density process is RDS(ON) = 10 @ VGS = -4.5 V.especially

Datasheet: FDB7030L , FDB7045L , FDB8030L , AS3401 , FDC5612 , FDC6301N , FDC6302P , FDC6303N , P60NF06 , FDC6305N , FDC6306P , FDC6308P , FDC633N , FDC634P , FDC636P , FDC637AN , FDC638P .

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