HUF75329S3
MOSFET. Datasheet pdf. Equivalent
Type Designator: HUF75329S3
Type of Transistor: MOSFET
Type of Control Channel: N
-Channel
Pdⓘ
- Maximum Power Dissipation: 94
W
|Vds|ⓘ - Maximum Drain-Source Voltage: 55
V
|Vgs|ⓘ - Maximum Gate-Source Voltage: 20
V
|Vgs(th)|ⓘ - Maximum Gate-Threshold Voltage: 4
V
|Id|ⓘ - Maximum Drain Current: 49
A
Tjⓘ - Maximum Junction Temperature: 150
°C
Qgⓘ - Total Gate Charge: 60
nC
Rdsⓘ - Maximum Drain-Source On-State Resistance: 0.024
Ohm
Package: TO262AA
HUF75329S3
Transistor Equivalent Substitute - MOSFET Cross-Reference Search
HUF75329S3
Datasheet (PDF)
0.1. Size:252K fairchild semi
huf75329g3 huf75329p3 huf75329s3s.pdf
HUF75329G3, HUF75329P3, HUF75329S3SData Sheet December 200149A, 55V, 0.024 Ohm, N-Channel UltraFET FeaturesPower MOSFETs 49A, 55VThese N-Channel power MOSFETs Ultra Low On-Resistance, rDS(ON) = 0.024are manufactured using the Temperature Compensating PSPICE and SABER innovative UltraFET process. This Modelsadvanced process technology - Available on t
6.1. Size:660K fairchild semi
huf75329d3st.pdf
HUF75329D3SData Sheet October 2013N-Channel UltraFET Power MOSFET Features55 V, 20 A, 26 m 20A, 55VThese N-Channel power MOSFETs are manufactured using Simulation Modelsthe innovative UltraFET process. This advanced process - Temperature Compensated PSPICE and SABER technology achieves the lowest possible on-resistance per Modelssilicon area, resulting in ou
6.2. Size:225K fairchild semi
huf75329d3-s.pdf
HUF75329D3, HUF75329D3SData Sheet December 200120A, 55V, 0.026 Ohm, N-Channel UltraFET FeaturesPower MOSFETs 20A, 55VThese N-Channel power MOSFETs Simulation Modelsare manufactured using the - Temperature Compensated PSPICE and SABER innovative UltraFET process. This Modelsadvanced process technology - SPICE and SABER Thermal Impedance Models achieves the
6.3. Size:715K onsemi
huf75329d3s.pdf
HUF75329D3SData Sheet October 2013N-Channel UltraFET Power MOSFETFeatures55 V, 20 A, 26 m 20A, 55VThese N-Channel power MOSFETs are manufactured Simulation Modelsusing the innovative UltraFET process. This advanced - Temperature Compensated PSPICE and SABER process technology achieves the lowest possible on-Modelsresistance per silicon area, resulting in o
Datasheet: HUF75321P3
, HUF75321S3
, HUF75321S3S
, HUF75321S3ST
, HUF75329D3
, HUF75329D3S
, HUF75329G3
, HUF75329P3
, IRFZ24N
, HUF75329S3S
, HUF75329S3ST
, HUF75332G3
, HUF75332P3
, HUF75332S3S
, HUF75333G3
, HUF75333P3
, HUF75333S3
.