APT50M60L2VRG
MOSFET. Datasheet pdf. Equivalent
Type Designator: APT50M60L2VRG
Type of Transistor: MOFETS
Type of Control Channel: N
-Channel
Pdⓘ
- Maximum Power Dissipation: 833
W
|Vds|ⓘ - Maximum Drain-Source Voltage: 500
V
|Vgs|ⓘ - Maximum Gate-Source Voltage: 30
V
|Vgs(th)|ⓘ - Maximum Gate-Threshold Voltage: 4
V
|Id|ⓘ - Maximum Drain Current: 77
A
Tjⓘ - Maximum Junction Temperature: 150
°C
Qgⓘ - Total Gate Charge: 560
nC
trⓘ - Rise Time: 25
nS
Cossⓘ -
Output Capacitance: 1800
pF
Rdsⓘ - Maximum Drain-Source On-State Resistance: 0.06
Ohm
Package: TO-264MAX
APT50M60L2VRG
Transistor Equivalent Substitute - MOSFET Cross-Reference Search
APT50M60L2VRG
Datasheet (PDF)
..1. Size:167K apt
apt50m60l2vrg.pdf 
APT50M60L2VR500V 77A 0.060 POWER MOS V MOSFETTO-264MaxPower MOS V is a new generation of high voltage N-Channel enhancementmode power MOSFETs. This new technology minimizes the JFET effect,increases packing density and reduces the on-resistance. Power MOS Valso achieves faster switching speeds through optimized gate layout. TO-264 MAX Package
2.1. Size:33K apt
apt50m60l2vr.pdf
APT50M60L2VR500V 77A 0.060WPOWER MOS VTO-264MaxPower MOS V is a new generation of high voltage N-Channel enhancementmode power MOSFETs. This new technology minimizes the JFET effect,increases packing density and reduces the on-resistance. Power MOS Valso achieves faster switching speeds through optimized gate layout. TO-264 MAX Package 100% Avalanche TestedD
3.1. Size:79K apt
apt50m60l2vfr.pdf
APT50M60L2VFR500V 77A 0.060WPOWER MOS V FREDFETTO-264MaxPower MOS V is a new generation of high voltage N-Channel enhancementmode power MOSFETs. This new technology minimizes the JFET effect,increases packing density and reduces the on-resistance. Power MOS Valso achieves faster switching speeds through optimized gate layout. TO-264 MAX Package Faster Switching D
3.2. Size:158K apt
apt50m60l2vfrg.pdf
APT50M60L2VFR500V 77A 0.060 POWER MOS V FREDFETTO-264MaxPower MOS V is a new generation of high voltage N-Channel enhancementmode power MOSFETs. This new technology minimizes the JFET effect,increases packing density and reduces the on-resistance. Power MOS Valso achieves faster switching speeds through optimized gate layout.D TO-264 MAX Packa
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