HUF75631S3S MOSFET. Datasheet pdf. Equivalent
Type Designator: HUF75631S3S
Type of Transistor: MOSFET
Type of Control Channel: N -Channel
Maximum Power Dissipation (Pd): 120 W
Maximum Drain-Source Voltage |Vds|: 100 V
Maximum Gate-Source Voltage |Vgs|: 20 V
Maximum Gate-Threshold Voltage |Vgs(th)|: 4 V
Maximum Drain Current |Id|: 33 A
Maximum Junction Temperature (Tj): 175 °C
Total Gate Charge (Qg): 66 nC
Maximum Drain-Source On-State Resistance (Rds): 0.04 Ohm
Package: TO263_D2PAK
HUF75631S3S Transistor Equivalent Substitute - MOSFET Cross-Reference Search
HUF75631S3S Datasheet (PDF)
1.1. huf75631sk8t.pdf 
Size:249K _update_mosfet
HUF75631SK8 Data Sheet December 2001 5.5A, 100V, 0.039 Ohm, N-Channel, UltraFET® Power MOSFET Packaging JEDEC MS-012AA Features BRANDING DASH • Ultra Low On-Resistance - rDS(ON) = 0.039Ω, VGS = 10V 5 • Simulation Models 1 - Temperature Compensated PSPICE® and SABER™ 2 Electrical Models 3 4 - Spice and SABER Thermal Impedance Models - www.fairchildsemi.com Symbol
1.2. huf75631s3st.pdf Size:200K _update_mosfet
HUF75631P3, HUF75631S3ST Data Sheet December 2001 33A, 100V, 0.040 Ohm, N-Channel, UltraFET® Power MOSFETs Packaging JEDEC TO-220AB JEDEC TO-263AB Features SOURCE DRAIN DRAIN (FLANGE) • Ultra Low On-Resistance GATE - rDS(ON) = 0.040Ω, VGS = 10V GATE • Simulation Models SOURCE - Temperature Compensated PSPICE® and SABER™ Electrical Models DRAIN (FLANGE) - Spice an
1.3. huf75631sk8.pdf Size:254K _fairchild_semi
HUF75631SK8 Data Sheet December 2001 5.5A, 100V, 0.039 Ohm, N-Channel, UltraFET® Power MOSFET Packaging JEDEC MS-012AA Features BRANDING DASH • Ultra Low On-Resistance - rDS(ON) = 0.039Ω, VGS = 10V 5 • Simulation Models 1 - Temperature Compensated PSPICE® and SABER™ 2 Electrical Models 3 4 - Spice and SABER Thermal Impedance Models - www.fairchildsemi.com Symbol
1.4. huf75631s3s.pdf Size:202K _fairchild_semi
HUF75631P3, HUF75631S3ST Data Sheet December 2001 33A, 100V, 0.040 Ohm, N-Channel, UltraFET Power MOSFETs Packaging JEDEC TO-220AB JEDEC TO-263AB Features SOURCE DRAIN DRAIN (FLANGE) Ultra Low On-Resistance GATE - rDS(ON) = 0.040?, VGS = 10V GATE Simulation Models SOURCE - Temperature Compensated PSPICE and SABER Electrical Models DRAIN (FLANGE) - Spice and SABER Therm
Datasheet: FQU5N40 , FDMC7582 , FQU5N60C , FDMQ8403 , FQU5P20 , FQU8P10 , FQU9N25 , HUF75542P3 , IRFP064N , FDB86135 , HUF75639S3 , FDD86252 , HUF75842P3 , HUF75852G3 , HUFA75307T3ST , HUFA75321D3S , HUFA75344S3 .
