July 2000FDG313NDigital FET, N-ChannelGeneral Description FeaturesThis N-Channel enhancement mode field effect 0.95 A, 25 V. RDS(on) = 0.45 @ VGS = 4.5 Vtransistor is produced using Fairchild's proprietary, highRDS(on) = 0.60 @ VGS = 2.7 V.cell density, DMOS technology. This very high densityprocess is especially tailored to minimize on-stateresistance. This devic

July 2000FDG313NDigital FET, N-ChannelGeneral Description FeaturesThis N-Channel enhancement mode field effect 0.95 A, 25 V. RDS(on) = 0.45 @ VGS = 4.5 Vtransistor is produced using Fairchild's proprietary, highRDS(on) = 0.60 @ VGS = 2.7 V.cell density, DMOS technology. This very high densityprocess is especially tailored to minimize on-stateresistance. This devic

July 2000FDG315NN-Channel Logic Level PowerTrench MOSFETGeneral Description FeaturesThis N-Channel Logic Level MOSFET is produced using 2 A, 30 V. RDS(ON) = 0.12 @ VGS = 10 VFairchild Semiconductor's advanced PowerTrench RDS(ON) = 0.16 @ VGS = 4.5 V.process that has been especially tailored to minimizeon-state resistance and yet maintain super

February 2000FDG311NN-Channel 2.5V Specified PowerTrench MOSFETGeneral Description FeaturesThis N-Channel MOSFET is produced using Fairchild 1.9 A, 20 V. RDS(ON) = 0.115 @ VGS = 4.5 VSemiconductor's advanced PowerTrench process thatRDS(ON) = 0.150 @ VGS = 2.5 V.has been especially tailored to minimize the on-stateresistance and yet maintain lo

February 1999FDG312PP-Channel 2.5V Specified PowerTrench MOSFETGeneral DescriptionFeaturesThis P-Channel MOSFET is produced using Fairchild -1.2 A, -20 V. RDS(on) = 0.18 @ VGS = -4.5 VSemiconductor's advanced PowerTrench process thatRDS(on) = 0.25 @ VGS = -2.5 V.has been especially tailored to minimize the on-stateresistance and yet maintain low gate charge for

December 2001FDG316PP-Channel Logic Level PowerTrench MOSFETGeneral Description FeaturesThis P-Channel Logic Level MOSFET is produced using -1.6 A, -30 V. RDS(ON) = 0.19 @ VGS = -10 VFairchild Semiconductor's advanced PowerTrenchRDS(ON) = 0.30 @ VGS = -4.5 V.process that has been especially tailored to minimizeon-state resistance and yet maint

July 2000FDG314PDigital FET, P-ChannelGeneral Description FeaturesThis P-Channel enhancement mode field effect -0.65 A, -25 V. RDS(ON) = 1.1 @ VGS = -4.5 Vtransistor is produced using Fairchild SemiconductorsRDS(ON) = 1.5 @ VGS = -2.7 V.proprietary, high cell density, DMOS technology. Thisvery high density process is tailored to minimize on-state resistance at

Is Now Part ofTo learn more about ON Semiconductor, please visit our website at www.onsemi.comPlease note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductors system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclatur

Is Now Part ofTo learn more about ON Semiconductor, please visit our website at www.onsemi.comPlease note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductors system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclatur