ST1004SRG MOSFET - описание производителя. Даташиты. Основные параметры и характеристики. Поиск аналога. Справочник
Наименование прибора: ST1004SRG
Маркировка: 104YA
Тип транзистора: MOSFET
Полярность: N
Максимальная рассеиваемая мощность (Pd): 1.25 W
Предельно допустимое напряжение сток-исток |Uds|: 100 V
Предельно допустимое напряжение затвор-исток |Ugs|: 20 V
Пороговое напряжение включения |Ugs(th)|: 2.5 V
Максимально допустимый постоянный ток стока |Id|: 3 A
Максимальная температура канала (Tj): 150 °C
Общий заряд затвора (Qg): 9 nC
Время нарастания (tr): 21.5 ns
Выходная емкость (Cd): 29 pf
Сопротивление сток-исток открытого транзистора (Rds): 0.31 Ohm
Тип корпуса: SOT-23
ST1004SRG Datasheet (PDF)
st1004srg.pdf
ST1004SRG N Channel Enhancement Mode MOSFET 2.0A DESCRIPTION ST1004SRG is the N-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. The process is especially to improve the overall efficiency of DC/DC conventional switching PWM controllers. It has been optimized for low gate charge, low R and fast switchi
bst100.pdf
DISCRETE SEMICONDUCTORSDATA SHEETBST100P-channel enhancement modevertical D-MOS transistorApril 1995Product specificationFile under Discrete Semiconductors, SC13bPhilips Semiconductors Product specificationP-channel enhancement mode verticalBST100D-MOS transistorDESCRIPTION QUICK REFERENCE DATAP-channel vertical D-MOS transistorDrain-source voltage -VDS max. 60 VT
st1005srg.pdf
ST1005SRG P Channel Enhancement Mode MOSFET -0.8A DESCRIPTION ST1005SRG is the P-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone an
st1002.pdf
ST1002 N Channel Enhancement Mode MOSFET 3.0A DESCRIPTION The ST1002 is the N-Channel logic enhancement mode power field effect transistor is produce using high cell density, DMOS trench technology. This high-density process is especially tailored to minimize on-state resistance. These device are particularly suited for low voltage application such as cellular phone and notebo
jst100n30t2.pdf
JST100N30T2 30V,100A N-channel MOSFETFeatures Application 30V,100A Load Switch R =3.1m (Typ.) @ V =10V PWM ApplicationDS(ON) GS R =4.5m (Typ.) @ V =4.5VDS(ON) GS Advanced Trench Technology Provide Excellent R and Low Gate ChargeDS(ON)Package JST100N30T2 Absolute Maximum Ratings (T =25 unless otherwise specified)CSymbol Parameter
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