March 2009 FDG6301N_F085 Dual N-Channel, Digital FETGeneral Description Features25 V, 0.22 A continuous, 0.65 A peak.These dual N-Channel logic level enhancement modefield effect transistors are produced using Fairchild's RDS(ON) = 4 @ VGS= 4.5 V,proprietary, high cell density, DMOS technology. ThisRDS(ON) = 5 @ VGS= 2.7 V.very high density process is especially tailor

July 1999 FDG6301N Dual N-Channel, Digital FETGeneral Description Features25 V, 0.22 A continuous, 0.65 A peak.These dual N-Channel logic level enhancement modefield effect transistors are produced using Fairchild's RDS(ON) = 4 @ VGS= 4.5 V,proprietary, high cell density, DMOS technology. ThisRDS(ON) = 5 @ VGS= 2.7 V.very high density process is especially tailored to

Digital FET, Dual N-ChannelFDG6301NGeneral DescriptionThese dual N-Channel logic level enhancement mode field effecttransistors are produced using ON Semiconductors proprietary, highcell density, DMOS technology. This very high density process iswww.onsemi.comespecially tailored to minimize on-state resistance. This device hasbeen designed especially for low voltage applicati

SMD Type MOSFETDual N-Channel MOSFETFDG6301N (KDG6301N) Features VDS (V) = 25V ID = 220m A (VGS = 4.5V) RDS(ON) 4 (VGS = 4.5V) RDS(ON) 5 (VGS = 2.7V) Gate-Source Zener for ESD ruggedness1 S1 S1 4 S2(>6kV Human Body Model).2 G12 G1 5 G23 D2 3 D2 6 D1 1 or 4 6 or 3 2 or 5 5 or 24 or 1 3 or 6 Absolute Maximum Ratings T