January 2003 FDV305N 20V N-Channel PowerTrench MOSFET General Description Features This 20V N-Channel MOSFET uses Fairchilds high 0.9 A, 20 V RDS(ON) = 220 m @ VGS = 4.5 V voltage PowerTrench process. It has been optimized for RDS(ON) = 300 m @ VGS = 2.5 V power management applications. Low gate charge Applications Fast switching speed Load s

Is Now Part ofTo learn more about ON Semiconductor, please visit our website at www.onsemi.comPlease note: As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductors system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclatur

August 1997 FDV303N Digital FET, N-ChannelGeneral Description Features25 V, 0.68 A continuous, 2 A Peak.These N-Channel enhancement mode field effect transistors areRDS(ON) = 0.45 @ VGS = 4.5 Vproduced using Fairchild's proprietary, high cell density, DMOStechnology. This very high density process is tailored to minimizeRDS(ON) = 0.6 @ VGS= 2.7 V.on-state resistanc

June 2009 FDV301N Digital FET , N-Channel General Description Features25 V, 0.22 A continuous, 0.5 A Peak.This N-Channel logic level enhancement mode field effectRDS(ON) = 5 @ VGS= 2.7 Vtransistor is produced using Fairchild's proprietary, high celldensity, DMOS technology. This very high density process isRDS(ON) = 4 @ VGS= 4.5 V.especially tailored to minimize on-

August 1997 FDV303N Digital FET, N-ChannelGeneral Description Features25 V, 0.68 A continuous, 2 A Peak.These N-Channel enhancement mode field effect transistors areRDS(ON) = 0.45 @ VGS = 4.5 Vproduced using Fairchild's proprietary, high cell density, DMOStechnology. This very high density process is tailored to minimizeRDS(ON) = 0.6 @ VGS= 2.7 V.on-state resistanc

October 1997 FDV302P Digital FET, P-Channel General Description Features-25 V, -0.12 A continuous, -0.5 A Peak.This P-Channel logic level enhancement mode field effect RDS(ON) = 13 @ VGS= -2.7 Vtransistor is produced using Fairchild's proprietary, high celldensity, DMOS technology. This very high density process is RDS(ON) = 10 @ VGS = -4.5 V.especially tailored t

October 1997 FDV302P Digital FET, P-Channel General Description Features-25 V, -0.12 A continuous, -0.5 A Peak.This P-Channel logic level enhancement mode field effect RDS(ON) = 13 @ VGS= -2.7 Vtransistor is produced using Fairchild's proprietary, high celldensity, DMOS technology. This very high density process is RDS(ON) = 10 @ VGS = -4.5 V.especially tailored t

August 1997 FDV304P Digital FET, P-Channel General Description Features-25 V, -0.46 A continuous, -1.5 A Peak.This P-Channel enhancement mode field effect transistors isproduced using Fairchild's proprietary, high cell density, DMOS RDS(ON) = 1.1 @ VGS = -4.5 Vtechnology. This very high density process is tailored to minimizeRDS(ON) = 1.5 @ VGS= -2.7 V. on-state resi

June 2009 FDV301N Digital FET , N-Channel General Description Features25 V, 0.22 A continuous, 0.5 A Peak.This N-Channel logic level enhancement mode field effectRDS(ON) = 5 @ VGS= 2.7 Vtransistor is produced using Fairchild's proprietary, high celldensity, DMOS technology. This very high density process isRDS(ON) = 4 @ VGS= 4.5 V.especially tailored to minimize on-

August 1997 FDV304P Digital FET, P-Channel General Description Features-25 V, -0.46 A continuous, -1.5 A Peak.This P-Channel enhancement mode field effect transistors isproduced using Fairchild's proprietary, high cell density, DMOS RDS(ON) = 1.1 @ VGS = -4.5 Vtechnology. This very high density process is tailored to minimizeRDS(ON) = 1.5 @ VGS= -2.7 V. on-state resi

Is Now Part ofTo learn more about ON Semiconductor, please visit our website at www.onsemi.comON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and oth

June 2009 FDV301N Digital FET , N-Channel General Description Features25 V, 0.22 A continuous, 0.5 A Peak.This N-Channel logic level enhancement mode field effectRDS(ON) = 5 @ VGS= 2.7 Vtransistor is produced using Fairchild's proprietary, high celldensity, DMOS technology. This very high density process isRDS(ON) = 4 @ VGS= 4.5 V.especially tailored to minimize on-

August 1997 FDV304P Digital FET, P-Channel General Description Features-25 V, -0.46 A continuous, -1.5 A Peak.This P-Channel enhancement mode field effect transistors isproduced using Fairchild's proprietary, high cell density, DMOS RDS(ON) = 1.1 @ VGS = -4.5 Vtechnology. This very high density process is tailored to minimizeRDS(ON) = 1.5 @ VGS= -2.7 V. on-state resi

SMD Type MOSFETN-Channel MOSFETFDV303N (KDV303N)SOT-23Unit: mm+0.12.9 -0.1+0.10.4 -0.13 Features VDS (V) = 25V ID = 0.68 A1 2 RDS(ON) 450m (VGS = 4.5V)+0.1+0.050.95-0.1 0.1-0.01+0.1 RDS(ON) 600m (VGS = 2.7V)1.9-0.11.GateD2.Source3.DrainG S Absolute Maximum Ratings Ta = 25Parameter Symbol Rating Unit Dra

SMD Type MOSFETN-Channel MOSFETFDV303N (KDV303N)SOT-23-3Unit: mm+0.22.9-0.1+0.10.4 -0.13 Features VDS (V) = 25V ID = 0.68 A1 2 RDS(ON) 450m (VGS = 4.5V) +0.02+0.10.15 -0.020.95 -0.1+0.11.9-0.2 RDS(ON) 600m (VGS = 2.7V)1.GateD2.Source3.DrainG S Absolute Maximum Ratings Ta = 25Parameter Symbol Rating Unit

N-Channel MOSFETFDV301NSOT-23Unit: mm+0.12.9 -0.1+0.10.4 -0.131 2+0.1+0.050.95-0.1 0.1-0.01+0.11.9-0.11. Gate2. Source3. Drain0.4+0.1+0.12.4-0.11.3-0.10.55+0.10.97-0.1+0.10-0.10.38-0.1N-Channel MOSFETFDV301N MarkingMarking 301SMD Type MOSFETN-Channel MOSFETFDV301N Typical Characterisitics1.40.5V GS = 4

FDV301NN-Channel MOSFET321. Gate2. Source13. Drain Simplified outline(SOT-23)www.slkormicro.com 1FDV301Nwww.slkormicro.com 2FDV301N Typical Characterisitics1.40.5V GS = 4.5V4.03.5VG S = 2.0V0.43 .01.22 .72.52.50.32 .713.00.22 .03 .54 .00.84 .50.11.50 0.60 0 .5 1 1.5 2 2.5 3 0 0 .1 0 .2 0 .3 0 .4 0.5V , DRAIN

FDV303NN-Channel Enhancement Mode MOSFETFeature20V/2A, RDS(ON) = 80m(MAX) @VGS = 4.5V. RDS(ON) = 90m(MAX) @VGS = 2.5V. Super High dense cell design for extremely low RDS(ON) .Reliable and Rugged. SOT-23 for Surface Mount Package. ApplicationsPower Management SOT-23Portable Equipment and Battery Powered Systems. Absolute Maximum Ratings TA=

FDV303Nwww.VBsemi.twN-Channel 20 V (D-S) MOSFETFEATURESPRODUCT SUMMARY Halogen-free According to IEC 61249-2-21VDS (V) RDS(on) ()ID (A)e Qg (Typ.)Definition0.028 at VGS = 4.5 V TrenchFET Power MOSFET6a 100 % Rg Tested20 0.042 at VGS = 2.5 V 6a 8.8 nC Compliant to RoHS Directive 2002/95/EC0.050 at VGS = 1.8 V 5.6APPLICATIONS DC/DC C

FDV301Nwww.VBsemi.twN-Channel 20 V (D-S) MOSFETFEATURESPRODUCT SUMMARY Halogen-free According to IEC 61249-2-21VDS (V) RDS(on) ()ID (A)e Qg (Typ.)Definition0.028 at VGS = 4.5 V TrenchFET Power MOSFET6a 100 % Rg Tested20 0.042 at VGS = 2.5 V 6a 8.8 nC Compliant to RoHS Directive 2002/95/EC0.050 at VGS = 1.8 V 5.6APPLICATIONS DC/DC C

FDV304Pwww.VBsemi.twP-Channel 20-V (D-S) MOSFETFEATURESMOSFET PRODUCT SUMMARY Halogen-free According to IEC 61249-2-21VDS (V) RDS(on) ()ID (A)a Qg (Typ.)Definition0.035 at VGS = - 10 V - 5e TrenchFET Power MOSFETe- 20 0.043 at VGS = - 4.5 V - 5 10 nC 100 % Rg Tested0.061 at VGS = - 2.5 V - 4.8 Compliant to RoHS Directive 2002/95/ECAPPLICATIONS