C101 Datasheet and Replacement

Ordering number:EN4775PNP/NPN Epitaxial Planar Silicon TransistorsRA101C/RC101CSwitching Applications(with Bias Resistances)Features Package Dimensions On-chip bias resistances (R1=47k , R2=47k ).unit:mm Compact package (CP).2018B[RA101C/RC101C]0.40.1630 to 0.11 0.95 20.951.92.91 : Base2 : Emitter( ) : RA101C3 : CollectorSANYO : CPSpec

DMC1017UPDCOMPLEMENTARY PAIR ENHANCEMENT MODE MOSFET POWERDI5060-8 Product Summary Features and Benefits Thermally Efficient Package-Cooler Running Applications ID Device V(BR)DSS RDS(ON) TA = +25C High Conversion Efficiency Low RDS(ON) Minimizes On State Losses 17m @ VGS = 4.5V 9.5A Q1 12V Low Input Capacitance 25m @ VGS = 2.5V 7.8A Fas

SIGC101T170R3E IGBT3 Power Chip Features: This chip is used for: 1700V Trench & Field Stop technology power modules C low turn-off losses short tail current Applications: positive temperature coefficient drives easy paralleling G E Chip Type VCE IC Die Size Package SIGC101T170R3E 1700V 75A 10.03 x 10.03 mm2 sawn on foil Mechanical Paramete

SIGC101T170R3E IGBT3 Power Chip Features: This chip is used for: 1700V Trench & Field Stop technology power modules C low turn-off losses short tail current Applications: positive temperature coefficient drives easy parallelingG E Chip Type VCE IC Die Size PackageSIGC101T170R3E 1700V 75A 10.03 x 10.03 mm2 sawn on foil Mechanical Parameters

SEMICONDUCTOR KRC101~KRC106TECHNICAL DATA EPITAXIAL PLANAR NPN TRANSISTORSWITCHING APPLICATION. INTERFACE CIRCUIT AND DRIVER CIRCUIT APPLICATION. B CFEATURES With Built-in Bias Resistors.Simplify Circuit Design.Reduce a Quantity of Parts and Manufacturing Process.N DIM MILLIMETERSA 4.70 MAXEKB 4.80 MAXGC 3.70 MAXDD 0.45E 1.00F 1.27G 0.85H 0.45_

SEMICONDUCTOR KRC101S~KRC106STECHNICAL DATA EPITAXIAL PLANAR NPN TRANSISTORSWITCHING APPLICATION. INTERFACE CIRCUIT AND DRIVER CIRCUIT APPLICATION. EL B LFEATURES DIM MILLIMETERSWith Built-in Bias Resistors. _+A 2.93 0.20B 1.30+0.20/-0.15Simplify Circuit Design.C 1.30 MAX23 D 0.40+0.15/-0.05Reduce a Quantity of Parts and Manufacturing Process.E 2.40+0.30/

SEMICONDUCTOR KRC101M~KRC106MTECHNICAL DATA EPITAXIAL PLANAR NPN TRANSISTORSWITCHING APPLICATION. INTERFACE CIRCUIT AND DRIVER CIRCUIT APPLICATION. BFEATURES With Built-in Bias Resistors.Simplify Circuit Design.DIM MILLIMETERSOA 3.20 MAXReduce a Quantity of Parts and Manufacturing Process.HM B 4.30 MAXC 0.55 MAX_D 2.40 + 0.15E 1.27F 2.30C_+G 14.

SEMICONDUCTOR KRC101S~KRC106STECHNICAL DATA EPITAXIAL PLANAR NPN TRANSISTORSWITCHING APPLICATION. INTERFACE CIRCUIT AND DRIVER CIRCUIT APPLICATION. EL B LFEATURES DIM MILLIMETERSWith Built-in Bias Resistors. _+A 2.93 0.20B 1.30+0.20/-0.15Simplify Circuit Design.C 1.30 MAX23 D 0.40+0.15/-0.05Reduce a Quantity of Parts and Manufacturing Process.E 2.40+0.30/

AFC1016 Alfa-MOS 20V N & P Pair Technology Enhancement Mode MOSFET General Description Features AFC1016, N & P Pair enhancement mode N-Channel MOSFET, uses Advanced Trench Technology 20V/0.6A,RDS(ON)= 360m@VGS=4.5V to provide excellent RDS(ON), low gate charge. 20V/0.5A,RDS(ON)= 420m@VGS=2.5V These devices are particularly suited for low 20V/0.4A,RDS(ON)= 560m

Spec. No. : C392S6R Issued Date : 2013.08.01 CYStech Electronics Corp. Revised Date : 2018.10.24 Page No. : 1/ 13 N- AND P-Channel Logic Level Enhancement Mode MOSFET N-CH P-CH MTC1016S6R BVDSS 20V -20V ID @VGS=(-)4.5V, TA=25C 0.82A -0.57A RDSON(typ.) @VGS=(-)4.5V 0.30 0.61 RDSON(typ.) @VGS=(-)2.5V 0.43 1.00 RDSON(typ.) @VGS=(-)1.8V 0.63 1.64 Features

DTC 101 ~ 108SEMICONDUCTORDTC 110 ~ 112 / 114 /117TECHNICAL DATADTC 123 / 124Bias Resistor TransistorNPN Silicon Surface Mount Transistorwith Monolithic Bias Resistor NetworkThis new series of digital transistors is designed to replace a singledevice and its external resistor bias network. The BRT (Bias Resistor3Transistor) contains a single transistor with a monolithic bi

SMD Type TransistorsNPN TransistorsKRC101S ~ KRC106SSOT-23Unit: mm2.9+0.1-0.1+0.10.4-0.13 Features With Built-in Bias Resistors. Simplify Circuit Design.1 2 Reduce a Quantity of Parts and Manufacturing Process.+0.1+0.050.95 -0.1 0.1 -0.01+0.11.9 -0.11.IN(B)2.COMMON(E)3.OUT(C)BIAS RESISTOR VALUESTYPE NO.R1(k ) R2(k )OUTKRC101S

MMBTRC101SS ... MMBTRC106SSMMBTRC101SS ... MMBTRC106SSSurface Mount Bias Resistor TransistorsNPN NPNSMD Transistoren mit EingangsspannungsteilerVersion 2011-02-10Power dissipation Verlustleistung 200 mW 0.11.1 2.9Plastic case SOT-230.4 3Kunststoffgehuse (TO-236)TypeWeight approx. Gewicht ca. 0.01 gCode1 2Plastic material has UL classification 94V-

SPC1016 N & P Pair Enhancement Mode MOSFET DESCRIPTION APPLICATIONS Power Management in Note book The SPC1016 is the Dual P-Channel enhancement mode Portable Equipment power field effect transistors are produced using high cell Battery Powered System density , DMOS trench technology. This high density DC/DC Converter process is especially tailored to minimize on-state

SPC1810 N & P Pair Enhancement Mode MOSFET DESCRIPTION APPLICATIONS Power Management in Note book The SPC1810 is the N- and P-Channel enhancement Portable Equipment mode power field effect transistors are produced using Battery Powered System high cell density , DMOS trench technology. This high DC/DC Converter density process is especially tailored to minimize on-sta