All Transistors. DTC114EY3 Datasheet

 

DTC114EY3 Datasheet and Replacement


   Type Designator: DTC114EY3
   SMD Transistor Code: 8A
   Material of Transistor: Si
   Polarity: Pre-Biased-NPN
   Built in Bias Resistor R1 = 10 kOhm
   Built in Bias Resistor R2 = 10 kOhm
   Typical Resistor Ratio R1/R2 = 1
   Maximum Collector Power Dissipation (Pc): 0.15 W
   Maximum Collector-Emitter Voltage |Vce|: 50 V
   Maximum Emitter-Base Voltage |Veb|: 10 V
   Maximum Collector Current |Ic max|: 0.05 A
   Max. Operating Junction Temperature (Tj): 150 °C
   Transition Frequency (ft): 250 MHz
   Forward Current Transfer Ratio (hFE), MIN: 30
   Noise Figure, dB: -
   Package: SOT-723
 

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DTC114EY3 Datasheet (PDF)

 ..1. Size:326K  cystek
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DTC114EY3

Spec. No. : C351Y3 Issued Date : 2011.08.24 CYStech Electronics Corp.Revised Date : Page No. : 1/6 NPN Digital Transistors (Built-in Resistors) DTC114EY3 Features Built-in bias resistors enable the configuration of an inverter circuit without connecting external input resistors (see equivalent circuit). The bias resistors consist of thin-film resistors with complete

 7.1. Size:56K  motorola
pdtc114et 7.pdf pdf_icon

DTC114EY3

DISCRETE SEMICONDUCTORSDATA SHEEThalfpageM3D088PDTC114ETNPN resistor-equipped transistor1999 Apr 15Product specificationSupersedes data of 1998 Nov 26Philips Semiconductors Product specificationNPN resistor-equipped transistor PDTC114ETFEATURES Built-in bias resistors R1 and R2(typ. 10 k each)3dbook, 4 columns3 Simplification of circuit designR1

 7.2. Size:58K  motorola
pdtc114eu 4.pdf pdf_icon

DTC114EY3

DISCRETE SEMICONDUCTORSDATA SHEETbook, halfpageM3D102PDTC114EUNPN resistor-equipped transistor1999 Apr 16Product specificationSupersedes data of 1998 Nov 26Philips Semiconductors Product specificationNPN resistor-equipped transistor PDTC114EUFEATURES Built-in bias resistors R1 and R2(typ. 10 k each)3handbook, 4 columns Simplification of circuit design

 7.3. Size:56K  motorola
pdtc114ee 4.pdf pdf_icon

DTC114EY3

DISCRETE SEMICONDUCTORSDATA SHEETM3D173PDTC114EENPN resistor-equipped transistor1999 May 18Product specificationSupersedes data of 1998 Nov 26Philips Semiconductors Product specificationNPN resistor-equipped transistor PDTC114EEFEATURES PINNING Built-in bias resistors R1 and R2 (typ. 10 k each)PIN DESCRIPTION Simplification of circuit design1 base/input

Datasheet: 2SA1801 , 2SA1802 , 2SA1802A , 2SA1803 , 2SA1803O , 2SA1803R , 2SA1804 , 2SA1804O , 2SD2499 , 2SA1805 , 2SA1805O , 2SA1805R , 2SA1806 , 2SA181 , 2SA1810 , 2SA1810B , 2SA1810C .

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