STP65NF06 Todos los transistores

 ..1. Size:338K  st
 std65nf06 stp65nf06.pdf

STD65NF06 STP65NF06 N-channel 60V - 11.5m - 60A - DPAK/TO-220 STripFET II Power MOSFET General features Type VDSS RDS(on) ID STD65NF06 60V

 ..2. Size:806K  cn vbsemi
 stp65nf06.pdf

STP65NF06 www.VBsemi.tw N-Channel 60-V (D-S) MOSFET FEATURES PRODUCT SUMMARY 175 C Junction Temperature VDS (V) RDS(on) ( ) ID (A)a TrenchFET Power MOSFET 0.011 at VGS = 10 V 60 Material categorization 60 0.012 at VGS = 4.5 V 50 D TO-220AB G S D S G N-Channel MOSFET ABSOLUTE MAXIMUM RATINGS (TC = 25 C, unless otherwise noted) Parameter Symbol Limi

 ..3. Size:205K  inchange semiconductor
 stp65nf06.pdf

INCHANGE Semiconductor isc N-Channel MOSFET Transistor STP65NF06 FEATURES With TO-220 packaging High speed switching Standard level gate drive Easy to use 100% avalanche tested Minimum Lot-to-Lot variations for robust device performance and reliable operation APPLICATIONS Power supply Switching applications ABSOLUTE MAXIMUM RATINGS(T =25 ) a SYMBOL PARAMET

 9.1. Size:120K  samhop
 stp652f.pdf

Gre r r P Pr Pr Pro STP652F a S mHop Microelectronics C orp. Ver 1.1 N-Channel Logic Level Enhancement Mode Field Effect Transistor FEATURES PRODUCT SUMMARY Super high dense cell design for extremely low RDS(ON). RDS(ON) (m ) Typ VDSS ID High power and current handling capability. 60V 29A 22 @ VGS=10V TO-220F package. D G G D S STF SERIES S TO-220F (TC=25 C unless ot

 9.2. Size:122K  samhop
 stp656f.pdf

Gr P Pr P P STP656F SamHop Microelectronics Corp. Ver 1.0 N-Channel Enhancement Mode Field Effect Transistor FEATURES PRODUCT SUMMARY Super high dense cell design for low RDS(ON). VDSS ID RDS(ON) (m ) Max Rugged and reliable. 19 @ VGS=10V TO-220F Package. 60V 22A 29 @ VGS=4.5V D G G D S STF SERIES TO-220F S (TC=25 C unless otherwise noted) ABSOLUTE MAXIMUM RATINGS Sym

 9.3. Size:838K  stansontech
 stp6506.pdf

STP6506 Dual P Channel Enhancement Mode MOSFET -2.8A DESCRIPTION The STC6506 is the dual P-Channel enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance and provide superior switching performance. These devices are particularly suited for low