HUF75639SF085A MOSFET Equivalente. Reemplazo. Hoja de especificaciones. Principales características
Número de Parte: HUF75639SF085A
Tipo de FET: MOSFET
Polaridad de transistor: N
ESPECIFICACIONES MÁXIMAS
Pdⓘ - Máxima disipación de potencia: 200 W
|Vds|ⓘ - Voltaje máximo drenador-fuente: 100 V
|Vgs|ⓘ - Voltaje máximo fuente-puerta: 20 V
|Id|ⓘ - Corriente continua de drenaje: 56 A
Tjⓘ - Temperatura máxima de unión: 175 °C
CARACTERÍSTICAS ELÉCTRICAS
trⓘ - Tiempo de subida: 60 nS
Cossⓘ - Capacitancia de salida: 500 pF
RDSonⓘ - Resistencia estado encendido drenaje a fuente: 0.025 Ohm
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HUF75639SF085A datasheet
huf75639s3st.pdf
HUF75639G3, HUF75639P3, HUF75639S3S, HUF75639S3 Data Sheet December 2001 56A, 100V, 0.025 Ohm, N-Channel Features UltraFET Power MOSFETs 56A, 100V These N-Channel power MOSFETs Simulation Models are manufactured using the - Temperature Compensated PSPICE and SABER innovative UltraFET process. This Electrical Models advanced process technology - Spice and Saber T
huf75639s f085a.pdf
HUFA75639S3ST_F085A Data Sheet March 2012 56A, 100V, 0.025 Ohm, N-Channel Features UltraFET Power MOSFETs 56A, 100V These N-Channel power MOSFETs Peak Current vs Pulse Width Curve are manufactured using the UIS Rating Curve innovative UltraFET process. This advanced process technology Related Literature achieves the lowest possible on-resistance per silicon ar
huf75639g3 huf75639p3 huf75639s3s huf75639s3.pdf
HUF75639G3, HUF75639P3, HUF75639S3S, HUF75639S3 Data Sheet December 2001 56A, 100V, 0.025 Ohm, N-Channel Features UltraFET Power MOSFETs 56A, 100V These N-Channel power MOSFETs Simulation Models are manufactured using the - Temperature Compensated PSPICE and SABER innovative UltraFET process. This Electrical Models advanced process technology - Spice and Saber T
huf75639g3 huf75639p3 huf75639s3s huf75639s3.pdf
MOSFET Power, N-Channel, Ultrafet 100 V, 56 A, 25 mW HUF75639G3, HUF75639P3, HUF75639S3S, HUF75639S3 www.onsemi.com These N-Channel power MOSFETs are manufactured using the innovative Ultrafet process. This advanced process technology achieves the lowest possible on- resistance per silicon area, resulting in outstanding performance. This device is capable of withstanding high ener
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