STP4953A MOSFET. Datasheet. Equivalente. Reemplazo. Hoja de especificaciones. Principales características
Número de Parte: STP4953A
Tipo de FET: MOSFET
Polaridad de transistor: P
ESPECIFICACIONES MÁXIMAS
Máxima disipación de potencia (Pd): 2 W
Voltaje máximo drenador - fuente |Vds|: 30 V
Voltaje máximo fuente - puerta |Vgs|: 20 V
Corriente continua de drenaje |Id|: 5.3 A
Temperatura máxima de unión (Tj): 150 °C
CARACTERÍSTICAS ELÉCTRICAS
Tensión umbral entre puerta y fuente |Vgs(th)|: 2 V
Carga de la puerta (Qg): 5.3 nC
Tiempo de subida (tr): 11.5 nS
Conductancia de drenaje-sustrato (Cd): 83 pF
Resistencia entre drenaje y fuente RDS(on): 0.055 Ohm
Paquete / Cubierta: SOP-8
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STP4953A Datasheet (PDF)
stp4953a.pdf
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STP4953A -30V Dual P-Channel Fast Switching MOSFETsDESCRIPTIONFEATUREThe STP4953A is the Dual P-Channel logic -30V/-5.3A, RDS(ON) =46m(typ.)@VGS =-10V enhancement mode power field effect transistor is -30V/-3.6A, RDS(ON) =75m(typ.)@VGS =-4.5V produced using high cell density. advanced trench Super high density cell design for extremely low technology
stp4953.pdf
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STP4953 Dual P Channel Enhancement Mode MOSFET -5.2A DESCRIPTION STP4953 is the dual P-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as LCD backli
stp4925.pdf
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STP4925 Dual P Channel Enhancement Mode MOSFET -7.2A DESCRIPTION STP4925 is the dual P-Channel logic enhancement mode power field effect transistor are produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application, notebook computer power
stp4931.pdf
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STP4931STP4931STP4931STP4931Dual P Channel Enhancement Mode MOSFET-8.5ADESCRIPTIONDESCRIPTIONDESCRIPTIONDESCRIPTIONSTP4931 is the dual P-Channel logic enhancement mode power field effect transistorsare produced using high cell density, DMOS trench technology. This high densityprocess is especially tailored to minimize on-state resistance. These devices areparticularly
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