ST2341S23RG MOSFET. Datasheet. Equivalente. Reemplazo. Hoja de especificaciones. Principales características

   Número de Parte: ST2341S23RG
   Tipo de FET: MOSFET
   Polaridad de transistor: P

ESPECIFICACIONES MÁXIMAS

   Pdⓘ - Máxima disipación de potencia: 1.25 W
   |Vds|ⓘ - Voltaje máximo drenador - fuente: 20 V
   |Vgs|ⓘ - Voltaje máximo fuente - puerta: 12 V
   |Id|ⓘ - Corriente continua de drenaje: 5.3 A
   Tjⓘ - Temperatura máxima de unión: 150 °C

CARACTERÍSTICAS ELÉCTRICAS

   trⓘ - Tiempo de subida: 35 nS
   Cossⓘ - Capacitancia de salida: 160 pF
   Rds(on)ⓘ - Resistencia estado encendido drenaje a fuente: 0.04 Ohm
   Paquete / Cubierta: SOT-23

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ST2341S23RG Datasheet (PDF)

..1. Size:602K stansontech
st2341s23rg.pdf

ST2341S23RG P Channel Enhancement Mode MOSFET -5.3A DESCRIPTION ST2341S23RG is the P-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular pho

4.1. Size:906K cn vbsemi
st2341s23r.pdf

ST2341S23Rwww.VBsemi.twP-Channel 30 V (D-S) MOSFETFEATURESPRODUCT SUMMARY TrenchFET Power MOSFET 100 % Rg TestedVDS (V) RDS(on) () Typ.ID (A)a Qg (Typ.)0.046 at VGS = - 10 V - 5.60.049 at VGS = - 6 V - 5 11.4 nC- 30APPLICATIONS0.054 at VGS = - 4.5 V -4.5 For Mobile Computing- Load Switch- Notebook Adaptor SwitchSTO-236- DC/DC Converter(SOT-

7.1. Size:598K stansontech
st2341srg.pdf

ST2341SRG P Channel Enhancement Mode MOSFET -3.2A DESCRIPTION ST2341SRG is the P-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology.This high density process is especially tailored to minimize on-state resistance.These devices are particularly suited for low voltage application such as cellular phone and

8.1. Size:576K stansontech
st2341a.pdf

ST2341A P Channel Enhancement Mode MOSFET -6.0A DESCRIPTION ST2341A is the P-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as cellular phone and n

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