HUF76445S3ST MOSFET Equivalente. Reemplazo. Hoja de especificaciones. Principales características
Número de Parte: HUF76445S3ST
Tipo de FET: MOSFET
Polaridad de transistor: N
ESPECIFICACIONES MÁXIMAS
Pdⓘ - Máxima
disipación de potencia: 310 W
|Vds|ⓘ - Voltaje máximo drenador-fuente: 60 V
|Vgs|ⓘ - Voltaje máximo fuente-puerta: 16 V
|Id|ⓘ - Corriente continua
de drenaje: 75 A
Tjⓘ - Temperatura máxima de unión: 175 °C
CARACTERÍSTICAS ELÉCTRICAS
trⓘ - Tiempo
de subida: 325 nS
Cossⓘ - Capacitancia de salida: 1250 pF
RDSonⓘ - Resistencia estado encendido drenaje a fuente: 0.0065 Ohm
Encapsulados: TO-263AB
Búsqueda de reemplazo de HUF76445S3ST MOSFET
- Selecciónⓘ de transistores por parámetros
HUF76445S3ST datasheet
..1. Size:207K fairchild semi
huf76445s3st.pdf 
HUF76445P3, HUF76445S3S Data Sheet December 2001 75A, 60V, 0.0075 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging Features JEDEC TO-220AB JEDEC TO-263AB Ultra Low On-Resistance SOURCE DRAIN - rDS(ON) = 0.0065 , VGS = 10V DRAIN (FLANGE) GATE - rDS(ON) = 0.0075 , VGS = 5V Simulation Models GATE - Temperature Compensated PSPICE and SABER SOURCE
6.1. Size:214K fairchild semi
huf76445p3-s3s.pdf
HUF76445P3, HUF76445S3S Data Sheet December 2001 75A, 60V, 0.0075 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging Features JEDEC TO-220AB JEDEC TO-263AB Ultra Low On-Resistance SOURCE DRAIN - rDS(ON) = 0.0065 , VGS = 10V DRAIN (FLANGE) GATE - rDS(ON) = 0.0075 , VGS = 5V Simulation Models GATE - Temperature Compensated PSPICE and SABER SOURCE
7.1. Size:217K fairchild semi
huf76443p3-s3s.pdf
HUF76443P3, HUF76443S3S Data Sheet December 2001 75A, 60V, 0.0095 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging Features JEDEC TO-220AB JEDEC TO-263AB Ultra Low On-Resistance SOURCE DRAIN - rDS(ON) = 0.008 , VGS = 10V DRAIN (FLANGE) GATE - rDS(ON) = 0.0095 , VGS = 5V Simulation Models GATE - Temperature Compensated PSPICE and SABER SOURCE E
8.1. Size:209K fairchild semi
huf76439s3st.pdf
HUF76439P3, HUF76439S3S Data Sheet December 2001 71A, 60V, 0.014 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging Features JEDEC TO-220AB JEDEC TO-263AB Ultra Low On-Resistance - rDS(ON) = 0.012 , VGS = 10V SOURCE DRAIN - rDS(ON) = 0.014 , VGS = 5V DRAIN (FLANGE) GATE Simulation Models - Temperature Compensated PSPICE and SABER GATE Electrical
8.2. Size:346K fairchild semi
huf76429d f085.pdf
HUFA76429D3ST_F085 Data Sheet September 2010 20A, 60V, 0.027 Ohm, N-Channel, Logic Level UltraFET Power MOSFETs Packaging Features Ultra Low On-Resistance JEDEC TO-252AA - rDS(ON) = 0.023 , VGS = 10V - rDS(ON) = 0.027 , VGS = 5V DRAIN (FLANGE) Simulation Models - Temperature Compensated PSPICE and SABER Electriecal Models GATE - Spice and SABER Thermal Im
8.3. Size:149K fairchild semi
huf76407d3st.pdf
HUF76407D3, HUF76407D3S Data Sheet December 2001 11A, 60V, 0.107 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging JEDEC TO-251AA JEDEC TO-252AA Features DRAIN DRAIN SOURCE Ultra Low On-Resistance (FLANGE) (FLANGE) DRAIN GATE - rDS(ON) = 0.092 , VGS = 10V - rDS(ON) = 0.107 , VGS = 5V GATE Simulation Models SOURCE - Temperature Compensated PSPICE and
8.4. Size:211K fairchild semi
huf76409d3-s.pdf
HUF76409D3, HUF76409D3S Data Sheet December 2001 17A, 60V, 0.071 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging JEDEC TO-251AA JEDEC TO-252AA Features Ultra Low On-Resistance - rDS(ON) = 0.063 , VGS = 10V DRAIN DRAIN SOURCE (FLANGE) (FLANGE) - rDS(ON) = 0.071 , VGS = 5V DRAIN GATE Simulation Models GATE - Temperature Compensated PSPICE and SABER
8.5. Size:266K fairchild semi
huf76407dk8.pdf
HUF76407DK8 Data Sheet December 2001 3.5A, 60V, 0.105 Ohm, Dual N-Channel, Logic Level UltraFET Power MOSFET Packaging Features JEDEC MS-012AA Ultra Low On-Resistance BRANDING DASH - rDS(ON) = 0.090 , VGS = 10V - rDS(ON) = 0.105 , VGS = 5V Simulation Models 5 - Temperature Compensated PSPICE and SABER Electrical Models 1 2 - SPICE and SABER Thermal Impedanc
8.6. Size:285K fairchild semi
huf76429d3st.pdf
HUF76429D3, HUF76429D3S Data Sheet February 2005 20A, 60V, 0.027 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging JEDEC TO-251AA JEDEC TO-252AA Features Ultra Low On-Resistance DRAIN - rDS(ON) = 0.023 , VGS = 10V SOURCE (FLANGE) DRAIN - rDS(ON) = 0.027 , VGS = 5V GATE Simulation Models GATE - Temperature Compensated PSPICE and SABER SOURCE Elect
8.7. Size:321K fairchild semi
huf76419s f085.pdf
April 2013 HUF76419S3ST_F085 N-Channel Power Trench MOSFET 60V, 29A, 35m D D Features Typ rDS(on) = 26.7m at VGS = 10V, ID = 29A Typ Qg(tot) = 23.7nC at VGS = 10V, ID = 29A G UIS Capability RoHS Compliant G S Qualified to AEC Q101 TO-263AB S MOSFET Maximum Ratings TJ = 25 C unless otherwise noted Symbol Parameter Ratings Units VDSS Drain to Source Voltage 60 V
8.9. Size:213K fairchild semi
huf76419s3st.pdf
HUF76419P3, HUF76419S3S Data Sheet December 2001 27A, 60V, 0.040 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging Features JEDEC TO-220AB JEDEC TO-263AB Ultra Low On-Resistance SOURCE DRAIN - rDS(ON) = 0.035 , VGS = 10V DRAIN (FLANGE) GATE - rDS(ON) = 0.040 , VGS = 5V Simulation Models GATE - Temperature Compensated PSPICE and SABER SOURCE Elect
8.10. Size:215K fairchild semi
huf76437s3st.pdf
HUF76437P3, HUF76437S3S Data Sheet December 2001 64A, 60V, 0.017 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging Features JEDEC TO-220AB JEDEC TO-263AB Ultra Low On-Resistance SOURCE DRAIN - rDS(ON) = 0.014 , VGS = 10V DRAIN (FLANGE) GATE - rDS(ON) = 0.017 , VGS = 5V Simulation Models GATE - Temperature Compensated PSPICE and SABER SOURCE Ele
8.11. Size:199K fairchild semi
huf76423d3s.pdf
HUF76423D3, HUF76423D3S Data Sheet December 2001 20A, 60V, 0.037 Ohm, N-Channel, Logic Level UltraFET Power MOSFETFairchild Packaging Features JEDEC TO-251AA JEDEC TO-252AA Ultra Low On-Resistance - rDS(ON) = 0.032 , VGS = 10V DRAIN DRAIN - rDS(ON) = 0.037 , VGS = 5V SOURCE (FLANGE) (FLANGE) DRAIN GATE Simulation Models - Temperature Compensated PSPICE and SABER
8.12. Size:241K fairchild semi
huf76423p3.pdf
HUF76423P3, HUF76423S3S Data Sheet December 2001 33A, 60V, 0.035 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging JEDEC TO-220AB JEDEC TO-263AB Features DRAIN Ultra Low On-Resistance SOURCE (FLANGE) DRAIN - rDS(ON) = 0.030 , VGS = 10V GATE - rDS(ON) = 0.035 , VGS = 5V GATE Simulation Models - Temperature Compensated PSPICE and SABER SOURCE Elec
8.13. Size:206K fairchild semi
huf76429s3st.pdf
HUF76429P3, HUF76429S3S Data Sheet December 2001 44A, 60V, 0.025 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging Features JEDEC TO-220AB JEDEC TO-263AB Ultra Low On-Resistance DRAIN SOURCE - rDS(ON) = 0.022 , VGS = 10V DRAIN (FLANGE) GATE - rDS(ON) = 0.025 , VGS = 5V Simulation Models GATE - Temperature Compensated PSPICE and SABER SOURCE Elect
8.14. Size:196K fairchild semi
huf76419d3st.pdf
HUF76419D3, HUF76419D3S Data Sheet December 2001 20A, 60V, 0.043 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging Features JEDEC TO-251AA JEDEC TO-252AA Ultra Low On-Resistance - rDS(ON) = 0.037 , VGS = 10V DRAIN DRAIN - rDS(ON) = 0.043 , VGS = 5V SOURCE (FLANGE) (FLANGE) DRAIN GATE Simulation Models - Temperature Compensated PSPICE and SABER G
8.15. Size:220K fairchild semi
huf76419p3-s3s.pdf
HUF76419P3, HUF76419S3S Data Sheet December 2001 27A, 60V, 0.040 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging Features JEDEC TO-220AB JEDEC TO-263AB Ultra Low On-Resistance SOURCE DRAIN - rDS(ON) = 0.035 , VGS = 10V DRAIN (FLANGE) GATE - rDS(ON) = 0.040 , VGS = 5V Simulation Models GATE - Temperature Compensated PSPICE and SABER SOURCE Elect
8.16. Size:288K fairchild semi
huf76429d3-s.pdf
HUF76429D3, HUF76429D3S Data Sheet February 2005 20A, 60V, 0.027 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging JEDEC TO-251AA JEDEC TO-252AA Features Ultra Low On-Resistance DRAIN - rDS(ON) = 0.023 , VGS = 10V SOURCE (FLANGE) DRAIN - rDS(ON) = 0.027 , VGS = 5V GATE Simulation Models GATE - Temperature Compensated PSPICE and SABER SOURCE Elect
8.17. Size:210K fairchild semi
huf76439s3s.pdf
HUF76439P3, HUF76439S3S Data Sheet December 2001 71A, 60V, 0.014 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging Features JEDEC TO-220AB JEDEC TO-263AB Ultra Low On-Resistance - rDS(ON) = 0.012 , VGS = 10V SOURCE DRAIN - rDS(ON) = 0.014 , VGS = 5V DRAIN (FLANGE) GATE Simulation Models - Temperature Compensated PSPICE and SABER GATE Electrical
8.18. Size:197K fairchild semi
huf76419d3s.pdf
HUF76419D3, HUF76419D3S Data Sheet December 2001 20A, 60V, 0.043 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging Features JEDEC TO-251AA JEDEC TO-252AA Ultra Low On-Resistance - rDS(ON) = 0.037 , VGS = 10V DRAIN DRAIN - rDS(ON) = 0.043 , VGS = 5V SOURCE (FLANGE) (FLANGE) DRAIN GATE Simulation Models - Temperature Compensated PSPICE and SABER G
8.19. Size:617K fairchild semi
huf76413dk f085.pdf
October 2010 HUFA76413DK8T_F085 N-Channel Logic Level UltraFET Power MOSFET 60V, 4.8A, 56m General Description These N-Channel power MOSFETs are manufactured us- Applications ing the innovative UltraFET process. This advanced pro- Motor and Load Control cess technology achieves the lowest possible on- resistance per silicon area, resulting in outstanding perfor- Powertr
8.20. Size:214K fairchild semi
huf76407p3.pdf
HUF76407P3 Data Sheet December 2001 12A, 60V, 0.107 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging JEDEC TO-220AB Features Ultra Low On-Resistance SOURCE DRAIN - rDS(ON) = 0.092 , VGS = 10V GATE - rDS(ON) = 0.107 , VGS = 5V Simulation Models - Temperature Compensated PSPICE and SABER Electrical Models DRAIN - Spice and SABER Thermal Impedance Mo
8.21. Size:542K fairchild semi
huf76407dk f085.pdf
HUFA76407DK8T_F085 Data Sheet October 2010 3.5A, 60V, 0.105 Ohm, Dual N-Channel, Logic Level UltraFET Power MOSFET Features Packaging JEDEC MS-012AA Ultra Low On-Resistance - rDS(ON) = 0.090 , VGS = 10V BRANDING DASH - rDS(ON) = 0.105 , VGS = 5V Simulation Models - Temperature Compensated PSPICE and SABER 5 Electrical Models - SPICE and SABER Thermal Impedance
8.22. Size:221K fairchild semi
huf76432p3-s3s.pdf
HUF76432P3, HUF76432S3S Data Sheet December 2001 55A, 60V, 0.019 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging JEDEC TO-220AB JEDEC TO-263AB Features Ultra Low On-Resistance SOURCE DRAIN DRAIN (FLANGE) - rDS(ON) = 0.017 , VGS = 10V GATE - rDS(ON) = 0.019 , VGS = 5V GATE Simulation Models - Temperature Compensated PSPICE and SABER SOURCE Electr
8.23. Size:234K fairchild semi
huf76407d3 huf76407d3s.pdf
HUF76407D3, HUF76407D3S Data Sheet December 2001 11A, 60V, 0.107 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging JEDEC TO-251AA JEDEC TO-252AA Features DRAIN DRAIN SOURCE Ultra Low On-Resistance (FLANGE) (FLANGE) DRAIN GATE - rDS(ON) = 0.092 , VGS = 10V - rDS(ON) = 0.107 , VGS = 5V GATE Simulation Models SOURCE - Temperature Compensated PSPICE and
8.24. Size:207K fairchild semi
huf76429s3s.pdf
HUF76429P3, HUF76429S3S Data Sheet December 2001 44A, 60V, 0.025 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging Features JEDEC TO-220AB JEDEC TO-263AB Ultra Low On-Resistance DRAIN SOURCE - rDS(ON) = 0.022 , VGS = 10V DRAIN (FLANGE) GATE - rDS(ON) = 0.025 , VGS = 5V Simulation Models GATE - Temperature Compensated PSPICE and SABER SOURCE Elect
8.25. Size:792K onsemi
huf76407d3s.pdf
Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com Please note As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclatur
8.26. Size:785K onsemi
huf76423p3.pdf
Is Now Part of To learn more about ON Semiconductor, please visit our website at www.onsemi.com Please note As part of the Fairchild Semiconductor integration, some of the Fairchild orderable part numbers will need to change in order to meet ON Semiconductor s system requirements. Since the ON Semiconductor product management systems do not have the ability to manage part nomenclatur
8.27. Size:104K intersil
huf76413p3.pdf
HUF76413P3 Data Sheet November 1999 File Number 4723.1 22A, 60V, 0.056 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging Features JEDEC TO-220AB Ultra Low On-Resistance - rDS(ON) = 0.049 , VGS = 10V SOURCE - rDS(ON) = 0.056 , VGS = 5V DRAIN GATE Simulation Models - Temperature Compensated PSPICE and SABER Electrical Models - Spice and SABER Thermal Im
8.28. Size:111K intersil
huf76409p3.pdf
HUF76409P3 Data Sheet November 1999 File Number 4666.1 17A, 60V, 0.070 Ohm, N-Channel, Logic Level UltraFET Power MOSFET Packaging Features JEDEC TO-220AB Ultra Low On-Resistance - rDS(ON) = 0.062 , VGS = 10V SOURCE - rDS(ON) = 0.070 , VGS = 5V DRAIN GATE Simulation Models - Temperature Compensated PSPICE and SABER Electrical Models - Spice and SABER Thermal Im
Otros transistores... HUF76145S3, HUF76407D3ST, HUF76419D3ST, HUF76419S3ST, HUF76429D3ST, HUF76429S3ST, HUF76437S3ST, HUF76439S3ST, IRFP250, HUF76609D3ST, HUF76619D3ST, HUF76629D3ST, HUF76633S3ST, HUFA75307D3, HUFA75307D3S, HUFA75307D3ST, HUFA75307P3
