FDC6320C Todos los transistores

October 1997 FDC6320C Dual N & P Channel , Digital FET General Description Features These dual N & P Channel logic level enhancement mode field N-Ch 25 V, 0.22 A, RDS(ON) = 5 @ VGS= 2.7 V. effec transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density P-Ch 25 V, -0.12 A, RDS(ON) = 13 @ VGS= -2.7 V. process is especial

March 1999 FDC6323L Integrated Load Switch General Description Features VDROP=0.2V @ VIN=5V, IL=1A, VON/OFF= 1.5V to 8V These Integrated Load Switches are produced using VDROP=0.3V @ VIN=3.3V, IL=1A, VON/OFF= 1.5V to 8V. Fairchild's proprietary, high cell density, DMOS technology. This very high density process is High density cell design for extremely low on-resistance. especially

April 1999 FDC6321C Dual N & P Channel , Digital FET General Description Features These dual N & P Channel logic level enhancement mode N-Ch 25 V, 0.68 A, RDS(ON) = 0.45 @ VGS= 4.5 V field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very P-Ch -25 V, -0.46 A, RDS(ON) = 1.1 @ VGS= -4.5 V. high density process is especi

November 1998 FDC6329L Integrated Load Switch General Description Features This device is particularly suited for compact power VDROP=0.2V @ VIN=5V, IL=2.8A. R(ON) = 0.07 VDROP=0.2V management in portable electronic equipment where @ VIN=2.5V, IL=1.9A. R(ON) = 0.105 . 2.5V to 8V input and 2.5A output current capability are needed. This load switch integrates a small N-Channel

July 2000 FDC6327C Dual N & P-Channel 2.5V Specified PowerTrenchTM MOSFET Features General Description These N & P-Channel 2.5V specified MOSFETs are N-Channel 2.7A, 20V. RDS(on) = 0.08 @ VGS = 4.5V produced using Fairchild Semiconductor's advanced RDS(on) = 0.12 @ VGS = 2.5V PowerTrench process that has been especially tailored to minimize on-state resistance and yet mainta

March 1999 FDC6324L Integrated Load Switch General Description Features These Integrated Load Switches are produced using Fairchild's VDROP=0.2V @ VIN=12V, IL=1A, VON/OFF=1.5 to 8V proprietary, high cell density, DMOS technology. This very high VDROP=0.3V @ VIN=5V, IL=1A, VON/OFF=1.5 to 8V. density process is especially tailored to minimize on-state High density cell design for extr

FDC6321C Dual N & P Channel , Digital FET Features N-Ch 25 V, 0.68 A, RDS(ON) = 0.45 @ VGS= 4.5 V General Description P-Ch -25 V, -0.46 A, RDS(ON) = 1.1 @ VGS= -4.5 V. These dual N & P Channel logic level enhancement mode Very low level gate drive requirements allowing direct field effect transistors are produced using ON operation in 3 V circuits. VGS(th)

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FDC6321C www.VBsemi.tw N- and P-Channel 2 V (D-S) MOSFET 0 FEATURES PRODUCT SUMMARY Halogen-free According to IEC 61249-2-21 VDS (V) RDS(on) ( )ID (A) Definition 0.024 at VGS = 10 V 5.5 TrenchFET Power MOSFET N-Channel 20 0.036 at VGS = 4.5 V 4.2 100 % Rg Tested 0.069 at VGS = - 10 V - 3.4 Compliant to RoHS Directive 2002/95/EC P-Channel - 20 0.083 at V

FDC6327C www.VBsemi.tw N- and P-Channel 2 V (D-S) MOSFET 0 FEATURES PRODUCT SUMMARY Halogen-free According to IEC 61249-2-21 VDS (V) RDS(on) ( )ID (A) Definition 0.024 at VGS = 10 V 5.5 TrenchFET Power MOSFET N-Channel 20 0.036 at VGS = 4.5 V 4.2 100 % Rg Tested 0.069 at VGS = - 10 V - 3.4 Compliant to RoHS Directive 2002/95/EC P-Channel - 20 0.083 at V