FDG6322C Datasheet. Equivalente. Reemplazo. Hoja de especificaciones. Principales características

Número de Parte: FDG6322C  📄📄 

Tipo de FET: MOSFET

Polaridad de transistor: NP

ESPECIFICACIONES MÁXIMAS

Pdⓘ - Máxima disipación de potencia: 0.3 W

|Vds|ⓘ - Voltaje máximo drenador-fuente: 25 V

|Vgs|ⓘ - Voltaje máximo fuente-puerta: 8 V

|Id|ⓘ - Corriente continua de drenaje: 0.22 A

Tjⓘ - Temperatura máxima de unión: 150 °C

CARACTERÍSTICAS ELÉCTRICAS

RDSonⓘ - Resistencia estado encendido drenaje a fuente: 4 Ohm

Encapsulados: SC70

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FDG6322C datasheet

 ..1. Size:669K  fairchild semi
 fdg6322c.pdf pdf_icon

FDG6322C

June 2008 FDG6322C Dual N & P Channel Digital FET General Description Features These dual N & P-Channel logic level enhancement mode N-Ch 0.22 A, 25 V, RDS(ON) = 4.0 @ VGS= 4.5 V, field effect transistors are produced using Fairchild's RDS(ON) = 5.0 @ VGS= 2.7 V. proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimiz

 ..2. Size:250K  onsemi
 fdg6322c.pdf pdf_icon

FDG6322C

FDG6322C Features Dual N & P Channel Digital FET N-Ch 0.22 A, 25 V, RDS(ON) = 4.0 @ VGS= 4.5 V, RDS(ON) = 5.0 @ VGS= 2.7 V. General Description P-Ch -0.41 A,-25V, RDS(ON) = 1.1 @ VGS= -4.5V, These dual N & P-Channel logic level enhancement mode RDS(ON) = 1.5 @ VGS= -2.7V. field effect transistors are produced using ON Semiconductor's proprietary, high cell densit

 8.1. Size:72K  fairchild semi
 fdg6321c.pdf pdf_icon

FDG6322C

November 1998 FDG6321C Dual N & P Channel Digital FET General Description Features These dual N & P-Channel logic level enhancement mode field N-Ch 0.50 A, 25 V, RDS(ON) = 0.45 @ VGS= 4.5V. effect transistors are produced using Fairchild's proprietary, RDS(ON) = 0.60 @ VGS= 2.7 V. high cell density, DMOS technology. This very high density process is especially tailored to mi

 8.2. Size:73K  fairchild semi
 fdg6320c.pdf pdf_icon

FDG6322C

November 1998 FDG6320C Dual N & P Channel Digital FET General Description Features These dual N & P-Channel logic level enhancement mode N-Ch 0.22 A, 25 V, RDS(ON) = 4.0 @ VGS= 4.5 V, field effect transistors are produced using Fairchild's RDS(ON) = 5.0 @ VGS= 2.7 V. proprietary, high cell density, DMOS technology. This very high density process is especially tailored to mi

MOSTRAR MÁS

Otros transistores... FDG6316P, FDG6317NZ, FDG6318P, FDG6318PZ, FDG6320C, STS4501, FDG6321C, STS4300, 8N65, STS400, FDG6332C, STS3623, FDG6332CF085, STS3621, FDG6335N, FDG8842CZ, STS3620