STP4925
MOSFET. Datasheet pdf. Equivalent
Type Designator: STP4925
Type of Transistor: MOSFET
Type of Control Channel: P
-Channel
Pdⓘ
- Maximum Power Dissipation: 2.8
W
|Vds|ⓘ - Maximum Drain-Source Voltage: 30
V
|Vgs|ⓘ - Maximum Gate-Source Voltage: 20
V
|Vgs(th)|ⓘ - Maximum Gate-Threshold Voltage: 3
V
|Id|ⓘ - Maximum Drain Current: 7.2
A
Tjⓘ - Maximum Junction Temperature: 150
°C
Qgⓘ - Total Gate Charge: 16
nC
trⓘ - Rise Time: 17
nS
Cossⓘ -
Output Capacitance: 350
pF
Rdsⓘ - Maximum Drain-Source On-State Resistance: 0.03
Ohm
Package:
SOP-8
STP4925
Transistor Equivalent Substitute - MOSFET Cross-Reference Search
STP4925
Datasheet (PDF)
..1. Size:431K stansontech
stp4925.pdf
STP4925 Dual P Channel Enhancement Mode MOSFET -7.2A DESCRIPTION STP4925 is the dual P-Channel logic enhancement mode power field effect transistor are produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application, notebook computer power
9.1. Size:386K semtron
stp4953a.pdf
STP4953A -30V Dual P-Channel Fast Switching MOSFETsDESCRIPTIONFEATUREThe STP4953A is the Dual P-Channel logic -30V/-5.3A, RDS(ON) =46m(typ.)@VGS =-10V enhancement mode power field effect transistor is -30V/-3.6A, RDS(ON) =75m(typ.)@VGS =-4.5V produced using high cell density. advanced trench Super high density cell design for extremely low technology
9.2. Size:325K stansontech
stp4931.pdf
STP4931STP4931STP4931STP4931Dual P Channel Enhancement Mode MOSFET-8.5ADESCRIPTIONDESCRIPTIONDESCRIPTIONDESCRIPTIONSTP4931 is the dual P-Channel logic enhancement mode power field effect transistorsare produced using high cell density, DMOS trench technology. This high densityprocess is especially tailored to minimize on-state resistance. These devices areparticularly
9.3. Size:485K stansontech
stp4953.pdf
STP4953 Dual P Channel Enhancement Mode MOSFET -5.2A DESCRIPTION STP4953 is the dual P-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as LCD backli
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